JPS6438690U - - Google Patents
Info
- Publication number
- JPS6438690U JPS6438690U JP13412187U JP13412187U JPS6438690U JP S6438690 U JPS6438690 U JP S6438690U JP 13412187 U JP13412187 U JP 13412187U JP 13412187 U JP13412187 U JP 13412187U JP S6438690 U JPS6438690 U JP S6438690U
- Authority
- JP
- Japan
- Prior art keywords
- synchronization
- resolution
- signal
- comb
- processing circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000926 separation method Methods 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 4
- 230000001360 synchronised effect Effects 0.000 description 1
Landscapes
- Synchronizing For Television (AREA)
Description
第１図は本考案を実施した同期信号処理回路の
回路図であり、第２図はその各部の信号波形図で
ある。第３図は従来例の回路図であり、第４図は
それを説明するための信号波形図である。
１……パーソナルコンピユーター、６……櫛型
フイルタ、８……同期分離回路、１０……第２の
切り換えスイツチ、Ｈ……水平同期信号、Ｖ……
垂直同期信号。
FIG. 1 is a circuit diagram of a synchronous signal processing circuit embodying the present invention, and FIG. 2 is a signal waveform diagram of each part thereof. FIG. 3 is a circuit diagram of a conventional example, and FIG. 4 is a signal waveform diagram for explaining it. DESCRIPTION OF SYMBOLS 1...Personal computer, 6...Comb filter, 8...Synchronization separation circuit, 10...Second changeover switch, H...Horizontal synchronization signal, V...
Vertical sync signal.
Claims (1)
モードを有する高解像度対応デイスプレイテレビ
における同期信号処理回路であつて、櫛型フイル
タを経由した標準テレビ信号の同期信号と前記櫛
型フイルタを経由しない高解像度信号源からの高
解像度用同期信号とを切り換える切り換え手段を
通して前記各同期信号をＡＦＣ機能付きの同期分
離回路へ導くようにしたことを特徴とする同期信
号処理回路。 A synchronization signal processing circuit in a high-resolution compatible display television having a high-resolution signal reception mode and a standard television signal reception mode, the synchronization signal of a standard television signal passing through a comb-shaped filter and the high-resolution signal not passing through the comb-shaped filter. A synchronization signal processing circuit characterized in that each of the synchronization signals is guided to a synchronization separation circuit with an AFC function through switching means for switching between high-resolution synchronization signals from a source.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13412187U JPS6438690U (en) | 1987-09-02 | 1987-09-02 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13412187U JPS6438690U (en) | 1987-09-02 | 1987-09-02 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6438690U true JPS6438690U (en) | 1989-03-08 |
Family
ID=31392586
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP13412187U Pending JPS6438690U (en) | 1987-09-02 | 1987-09-02 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6438690U (en) |
-
1987
- 1987-09-02 JP JP13412187U patent/JPS6438690U/ja active Pending