JPS6437641A - Intermediate buffer control system - Google Patents
Intermediate buffer control systemInfo
- Publication number
- JPS6437641A JPS6437641A JP62194850A JP19485087A JPS6437641A JP S6437641 A JPS6437641 A JP S6437641A JP 62194850 A JP62194850 A JP 62194850A JP 19485087 A JP19485087 A JP 19485087A JP S6437641 A JPS6437641 A JP S6437641A
- Authority
- JP
- Japan
- Prior art keywords
- bytes
- block
- access
- msu
- transferred
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Abstract
PURPOSE:To attain efficient memory access by reducing the main storage access priority of a move-in address register when the value of an access counter reaches a previously determined value. CONSTITUTION:A local buffer storage (LBS) consists of 32 bytes/block, a groval buffer storage (GBS) consists of 64 bytes/block. When an access request is received in the order of block fetching storing at the time of transferring each 8 bytes between a main storage unit (MSU) a main control unit (MCU), 32 bytes (8 bytes X 4) in the first half are transferred from the MSU and then the succeeding storing processing is executed before transferring 32 bytes in the latter half, and during the succeeding idle time, the above-mentioned 32 bytes in the latter half are controlled so as to be transferred.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62194850A JPH0685154B2 (en) | 1987-08-04 | 1987-08-04 | Intermediate buffer control method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62194850A JPH0685154B2 (en) | 1987-08-04 | 1987-08-04 | Intermediate buffer control method |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS6437641A true JPS6437641A (en) | 1989-02-08 |
JPH0685154B2 JPH0685154B2 (en) | 1994-10-26 |
Family
ID=16331319
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP62194850A Expired - Fee Related JPH0685154B2 (en) | 1987-08-04 | 1987-08-04 | Intermediate buffer control method |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0685154B2 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04156635A (en) * | 1990-10-19 | 1992-05-29 | Fujitsu Ltd | Block read address generation system |
-
1987
- 1987-08-04 JP JP62194850A patent/JPH0685154B2/en not_active Expired - Fee Related
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04156635A (en) * | 1990-10-19 | 1992-05-29 | Fujitsu Ltd | Block read address generation system |
Also Published As
Publication number | Publication date |
---|---|
JPH0685154B2 (en) | 1994-10-26 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
ES8800767A1 (en) | Queue administration method and apparatus. | |
CA2042515A1 (en) | Cache memory exchange protocol | |
JPS6437641A (en) | Intermediate buffer control system | |
JPS57141768A (en) | High speed transferring device for video information | |
JPS6437640A (en) | Control system for cache memory | |
JPS5489434A (en) | Memory access control processing system | |
JPS5613576A (en) | Memory access control system | |
JPS6473458A (en) | System for controlling access of vector data | |
JPS5533282A (en) | Buffer control system | |
JPS6478361A (en) | Data processing system | |
JPH02287750A (en) | Address conversion system of channel device | |
JPS5475231A (en) | Buffer memory control system | |
JPS6484354A (en) | Memory access system | |
JPS56159887A (en) | Buffer memory circuit | |
JPS6360428B2 (en) | ||
JPS6473416A (en) | Magnetic tape control device | |
JPS6468868A (en) | Buffer control system for bus adapter | |
JPS6115247A (en) | Data processor | |
JPS54136235A (en) | Memory control system | |
JPS56135260A (en) | Inter-processor information transfer system | |
JPS5733479A (en) | Buffer invalidation control system | |
JPS5587362A (en) | Buffer memory control system | |
JPS5580139A (en) | Queue control system | |
JPS57114966A (en) | Computer system | |
JPS5759219A (en) | Data processing system |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
LAPS | Cancellation because of no payment of annual fees |