JPS5475231A - Buffer memory control system - Google Patents

Buffer memory control system

Info

Publication number
JPS5475231A
JPS5475231A JP14299977A JP14299977A JPS5475231A JP S5475231 A JPS5475231 A JP S5475231A JP 14299977 A JP14299977 A JP 14299977A JP 14299977 A JP14299977 A JP 14299977A JP S5475231 A JPS5475231 A JP S5475231A
Authority
JP
Japan
Prior art keywords
information
block
memory
loaded
memory area
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP14299977A
Other languages
Japanese (ja)
Other versions
JPS571062B2 (en
Inventor
Tsutomu Tanaka
Keiichiro Uchida
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP14299977A priority Critical patent/JPS5475231A/en
Publication of JPS5475231A publication Critical patent/JPS5475231A/en
Publication of JPS571062B2 publication Critical patent/JPS571062B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Memory System (AREA)
  • Memory System Of A Hierarchy Structure (AREA)

Abstract

PURPOSE: To perform immediately storing for the store request of the same address as block-loaded information by storing information which is block-loaded in the memory area other than the memory area where information is stored on a basis of the request of a block memory area.
CONSTITUTION: The information exchange between main memory 1 and buffer memory 8 is performed in block transfer, and the information storing is performed simultaneously for memory 8 and memory 1. Here, in case that the store request for the same address as block-loaded information occurs when this information is block-loaded from memory 1 to memory 8, information is stored in a prescribed block memory area of memory 8 on a basis of this request, and block-loaded information is stored in the word memory area other than the word memory area where information is stored on the basis of the store request in the block memory area. As a result, storing can be immediately executed in case that the store request for the same address as block-loaded information occurs.
COPYRIGHT: (C)1979,JPO&Japio
JP14299977A 1977-11-29 1977-11-29 Buffer memory control system Granted JPS5475231A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14299977A JPS5475231A (en) 1977-11-29 1977-11-29 Buffer memory control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14299977A JPS5475231A (en) 1977-11-29 1977-11-29 Buffer memory control system

Publications (2)

Publication Number Publication Date
JPS5475231A true JPS5475231A (en) 1979-06-15
JPS571062B2 JPS571062B2 (en) 1982-01-09

Family

ID=15328576

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14299977A Granted JPS5475231A (en) 1977-11-29 1977-11-29 Buffer memory control system

Country Status (1)

Country Link
JP (1) JPS5475231A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57189385A (en) * 1981-05-14 1982-11-20 Nec Corp Cashe storage system
JP2011530103A (en) * 2008-07-29 2011-12-15 フリースケール セミコンダクター インコーポレイテッド System and method for fetching information for a cache module using a write-back allocation algorithm

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57189385A (en) * 1981-05-14 1982-11-20 Nec Corp Cashe storage system
JPH0255814B2 (en) * 1981-05-14 1990-11-28 Nippon Electric Co
JP2011530103A (en) * 2008-07-29 2011-12-15 フリースケール セミコンダクター インコーポレイテッド System and method for fetching information for a cache module using a write-back allocation algorithm

Also Published As

Publication number Publication date
JPS571062B2 (en) 1982-01-09

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