JPS6437046A - Multi-chip package - Google Patents

Multi-chip package

Info

Publication number
JPS6437046A
JPS6437046A JP62192860A JP19286087A JPS6437046A JP S6437046 A JPS6437046 A JP S6437046A JP 62192860 A JP62192860 A JP 62192860A JP 19286087 A JP19286087 A JP 19286087A JP S6437046 A JPS6437046 A JP S6437046A
Authority
JP
Japan
Prior art keywords
power source
wired substrate
cooling tubes
design
lsi
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP62192860A
Other languages
Japanese (ja)
Other versions
JPH0575182B2 (en
Inventor
Tatsuo Inoue
Akihiro Dotani
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP62192860A priority Critical patent/JPS6437046A/en
Publication of JPS6437046A publication Critical patent/JPS6437046A/en
Publication of JPH0575182B2 publication Critical patent/JPH0575182B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto

Abstract

PURPOSE:To increase device and wire integration density by a method wherein cooling tubes for LSI chips are separated into some systems electrically independent from each other and every one of the systems carries a different voltage for the supply of a plurality of voltages to a wired substrate. CONSTITUTION:In a package of this design, a cooling system is provided for the removal of heat from LSI chips 20 installed on a ceramic wired substrate 10. Located in the vicinity of cooling tubes 30, 33, and 34, wherein a coolant 31 circulates, the LSI chops 20 are kept at a low temperature. The copper-made cooling tubes 30, 33, and 34 are electrically independent from each other, and serve as power source wires. The power source voltages are applied to the ceramic wired substrate 10 through the intermediary of a copper foil 32. This design does not demand a power source wiring region in the wired substrate 10, allowing for an enhanced integration density.
JP62192860A 1987-07-31 1987-07-31 Multi-chip package Granted JPS6437046A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62192860A JPS6437046A (en) 1987-07-31 1987-07-31 Multi-chip package

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62192860A JPS6437046A (en) 1987-07-31 1987-07-31 Multi-chip package

Publications (2)

Publication Number Publication Date
JPS6437046A true JPS6437046A (en) 1989-02-07
JPH0575182B2 JPH0575182B2 (en) 1993-10-20

Family

ID=16298175

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62192860A Granted JPS6437046A (en) 1987-07-31 1987-07-31 Multi-chip package

Country Status (1)

Country Link
JP (1) JPS6437046A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012174856A (en) * 2011-02-21 2012-09-10 Hitachi Cable Ltd Heat sink and manufacturing method of the same

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105118811B (en) * 2015-07-27 2018-10-23 电子科技大学 A kind of temperature equalization system to be radiated to multi-heat source device using soaking plate and microchannel

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012174856A (en) * 2011-02-21 2012-09-10 Hitachi Cable Ltd Heat sink and manufacturing method of the same

Also Published As

Publication number Publication date
JPH0575182B2 (en) 1993-10-20

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Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees