JPS6437038A - Junction of semiconductor materials - Google Patents

Junction of semiconductor materials

Info

Publication number
JPS6437038A
JPS6437038A JP62193338A JP19333887A JPS6437038A JP S6437038 A JPS6437038 A JP S6437038A JP 62193338 A JP62193338 A JP 62193338A JP 19333887 A JP19333887 A JP 19333887A JP S6437038 A JPS6437038 A JP S6437038A
Authority
JP
Japan
Prior art keywords
wire
ball
section
sections
semiconductor material
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP62193338A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0533820B2 (enrdf_load_stackoverflow
Inventor
Toshinori Kogashiwa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tanaka Denshi Kogyo KK
Original Assignee
Tanaka Denshi Kogyo KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tanaka Denshi Kogyo KK filed Critical Tanaka Denshi Kogyo KK
Priority to JP62193338A priority Critical patent/JPS6437038A/ja
Publication of JPS6437038A publication Critical patent/JPS6437038A/ja
Publication of JPH0533820B2 publication Critical patent/JPH0533820B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/11—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods
    • H01L2224/113—Manufacturing methods by local deposition of the material of the bump connector
    • H01L2224/1133—Manufacturing methods by local deposition of the material of the bump connector in solid form
    • H01L2224/1134—Stud bumping, i.e. using a wire-bonding apparatus
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/78—Apparatus for connecting with wire connectors
    • H01L2224/7825—Means for applying energy, e.g. heating means
    • H01L2224/783—Means for applying energy, e.g. heating means by means of pressure
    • H01L2224/78301—Capillary

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)
JP62193338A 1987-07-31 1987-07-31 Junction of semiconductor materials Granted JPS6437038A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62193338A JPS6437038A (en) 1987-07-31 1987-07-31 Junction of semiconductor materials

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62193338A JPS6437038A (en) 1987-07-31 1987-07-31 Junction of semiconductor materials

Publications (2)

Publication Number Publication Date
JPS6437038A true JPS6437038A (en) 1989-02-07
JPH0533820B2 JPH0533820B2 (enrdf_load_stackoverflow) 1993-05-20

Family

ID=16306232

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62193338A Granted JPS6437038A (en) 1987-07-31 1987-07-31 Junction of semiconductor materials

Country Status (1)

Country Link
JP (1) JPS6437038A (enrdf_load_stackoverflow)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0394438A (ja) * 1989-09-06 1991-04-19 Shinko Electric Ind Co Ltd 半導体チップモジュール
JP2008091888A (ja) * 2006-09-22 2008-04-17 Stats Chippac Inc 基板に取り付けられたスタッドバンプを伴う、フリップチップパッケージング用の可融性入出力相互接続システムおよび方法
US9847309B2 (en) 2006-09-22 2017-12-19 STATS ChipPAC Pte. Ltd. Semiconductor device and method of forming vertical interconnect structure between semiconductor die and substrate

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0394438A (ja) * 1989-09-06 1991-04-19 Shinko Electric Ind Co Ltd 半導体チップモジュール
JP2008091888A (ja) * 2006-09-22 2008-04-17 Stats Chippac Inc 基板に取り付けられたスタッドバンプを伴う、フリップチップパッケージング用の可融性入出力相互接続システムおよび方法
US9847309B2 (en) 2006-09-22 2017-12-19 STATS ChipPAC Pte. Ltd. Semiconductor device and method of forming vertical interconnect structure between semiconductor die and substrate

Also Published As

Publication number Publication date
JPH0533820B2 (enrdf_load_stackoverflow) 1993-05-20

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