JPS6436122A - Phase locked loop circuit - Google Patents

Phase locked loop circuit

Info

Publication number
JPS6436122A
JPS6436122A JP62191958A JP19195887A JPS6436122A JP S6436122 A JPS6436122 A JP S6436122A JP 62191958 A JP62191958 A JP 62191958A JP 19195887 A JP19195887 A JP 19195887A JP S6436122 A JPS6436122 A JP S6436122A
Authority
JP
Japan
Prior art keywords
synchronism
state
threshold value
sequential
locked loop
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62191958A
Other languages
Japanese (ja)
Inventor
Kiyoo Hanabusa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP62191958A priority Critical patent/JPS6436122A/en
Publication of JPS6436122A publication Critical patent/JPS6436122A/en
Pending legal-status Critical Current

Links

Landscapes

  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)

Abstract

PURPOSE:To restore the state to the synchronizing state quickly even when out of synchronism is caused by discriminating out of synchronism so as to change a threshold value of a sequential filter. CONSTITUTION:A sequential counter 8 counts lead/lag control signals 4a, 4b from a sequential filter 4 and judges it to be in the state of out of synchronism when a prescribed number of each of the lead/lag control signals 4a,4b is counted consecutively to give an out of synchronism output. When the state of out of synchronism is detected, a threshold value of a threshold value setting means 9 is revised thereby decreasing the threshold value of the sequential filter 4 in the state of out of synchronism more than that in the synchronizing state. Thus, the frequency of phase adjustment is increased and the out of synchronism is cancelled quickly.
JP62191958A 1987-07-30 1987-07-30 Phase locked loop circuit Pending JPS6436122A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62191958A JPS6436122A (en) 1987-07-30 1987-07-30 Phase locked loop circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62191958A JPS6436122A (en) 1987-07-30 1987-07-30 Phase locked loop circuit

Publications (1)

Publication Number Publication Date
JPS6436122A true JPS6436122A (en) 1989-02-07

Family

ID=16283275

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62191958A Pending JPS6436122A (en) 1987-07-30 1987-07-30 Phase locked loop circuit

Country Status (1)

Country Link
JP (1) JPS6436122A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0463021A (en) * 1990-06-30 1992-02-28 Nec Corp Pll frequency synthesizer
JPH05145414A (en) * 1991-11-21 1993-06-11 Matsushita Electric Ind Co Ltd Automatic frequency controller

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0463021A (en) * 1990-06-30 1992-02-28 Nec Corp Pll frequency synthesizer
JPH05145414A (en) * 1991-11-21 1993-06-11 Matsushita Electric Ind Co Ltd Automatic frequency controller

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