JPS6435668A - Picture processor - Google Patents

Picture processor

Info

Publication number
JPS6435668A
JPS6435668A JP19158487A JP19158487A JPS6435668A JP S6435668 A JPS6435668 A JP S6435668A JP 19158487 A JP19158487 A JP 19158487A JP 19158487 A JP19158487 A JP 19158487A JP S6435668 A JPS6435668 A JP S6435668A
Authority
JP
Japan
Prior art keywords
picture
picture information
memory
circuit
termination
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP19158487A
Other languages
Japanese (ja)
Inventor
Hiroshi Sakuragi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Toshiba Intelligent Technology Co Ltd
Original Assignee
Toshiba Corp
Toshiba Intelligent Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Toshiba Intelligent Technology Co Ltd filed Critical Toshiba Corp
Priority to JP19158487A priority Critical patent/JPS6435668A/en
Publication of JPS6435668A publication Critical patent/JPS6435668A/en
Pending legal-status Critical Current

Links

Landscapes

  • Processing Or Creating Images (AREA)
  • Image Processing (AREA)

Abstract

PURPOSE:To simplify a hardware, by stopping compression processing by outputting a termination signal and outputting the picture information given with a termination code, and an interruption termination signal, when the picture information by one picture portion is outputted from a storage means. CONSTITUTION:The picture information read by a scanner 20, is stored in a page memory 14 through a scanner interface 37, a criss crosse conversion circuit 35, an enlargement/reduction circuit 34 and a picture bus 42. At the same time that the picture information is supplied to a picture display memory 15, it is displayed 24 through a display control part 16. Next, when storage is instructed, the picture information of the memory 14 is inputted to the circuits 34, 35 through the bus 42. A compression/expansion circuit 36 compresses the picture information, and stores it in the buffer memory 14a and an optical disk 19. When final data is outputted from the memory 14, a frame end signal is sent to the circuit 36 so as to stop the output of the picture information to the memory 14a. Simultaneously, a CPU12 sends a termination command to the circuit 35, and the circuit 36 stores a RTC signal in the disk 19, and at the same time, outputs a one picture termination interruption signal to the CPU12.
JP19158487A 1987-07-31 1987-07-31 Picture processor Pending JPS6435668A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19158487A JPS6435668A (en) 1987-07-31 1987-07-31 Picture processor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19158487A JPS6435668A (en) 1987-07-31 1987-07-31 Picture processor

Publications (1)

Publication Number Publication Date
JPS6435668A true JPS6435668A (en) 1989-02-06

Family

ID=16277079

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19158487A Pending JPS6435668A (en) 1987-07-31 1987-07-31 Picture processor

Country Status (1)

Country Link
JP (1) JPS6435668A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002170601A (en) * 2000-11-30 2002-06-14 Toyota Motor Corp Power supply device for vehicle

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002170601A (en) * 2000-11-30 2002-06-14 Toyota Motor Corp Power supply device for vehicle

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