JP2706672B2 - Image data compression / decompression mechanism - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to compression / decompression of image data in an image storage device, an image filing device, and the like.

[Conventional technology]

When digitizing an image signal with an image filing device, etc., and then storing, editing, and playing back one screen of image data as one unit, the smaller the capacity of this "one screen image data", the faster the processing speed It is also fast, and it is possible to store a larger number of screens if the capacity of the storage device is limited.

Therefore, in order to reduce the capacity of the image data for one screen, conventionally, a software operation is performed for compressing and expanding the image data by using a microprocessor.

[Problems to be solved by the invention]

When compressing / expanding image data by software processing using a microprocessor, there are various methods, but in general, all areas of a memory (frame memory) for one screen are read, and compression processing is performed while reading. Therefore, it takes a very long time (for example, 10 to several tens of seconds). Also in the case of decompression, similarly, there is a problem that it takes time because the compressed data is read out and written into the entire area of the frame memory while being decompressed.

SUMMARY OF THE INVENTION It is an object of the present invention to solve the above-mentioned problems and to provide a mechanism capable of realizing high-speed (for example, 1 millisecond or less) compression / expansion with a simple circuit configuration.

[Means for solving the problem]

In order to achieve the above object, in the image data compression / expansion mechanism of the present invention, video data having a certain luminance or more or less than a certain luminance is discarded and compressed data is stored, and at the time of decompression, data is discarded. Image data is restored by outputting a fixed luminance value.

Hereinafter, the principle configuration and functions of the present invention will be described with reference to the functional block diagram shown in FIG.

An input terminal 1 is supplied with a video digital input signal A obtained by digitizing an image signal. This input signal A is compared with a threshold value B output from the first storage means 3 by the comparison means 2. The threshold value B defines conditions for extracting compressed data from the input signal A, and is normally set by a microcomputer (CPU; not shown). It is remembered. The comparing means 2 compares the input signal A with the threshold value B, and activates the output D when the comparison condition is satisfied. As the comparison condition, A> B or A <B can be selected by the selection signal C. The output D of the comparison means 2 is sent to a second storage means 4 for storing its state as map (MAP) data E and a third storage means 5 for storing compressed data. Third storage means 5
Stores the input signal A as compressed data F only when the output D is active.

As described above, the image data compression processing unit is configured by the above-described units, and compressed data is stored.

 Next, expansion of compressed data will be described.

The compressed data F stored in the third storage means 5 is sent to the switching means 6. The switching means 6 is also provided with a default value G stored in the fourth storage means 7, and switches between the compressed data F and the default value G based on the map data E from the second storage means 4. Then, it outputs to the output terminal 8 as the video digital expansion output signal H. The default value G defines conditions for decompressing the compressed data. The default value G is set by a microcomputer (CPU; not shown) in consideration of the threshold value B, and is stored in the fourth storage means 7. It is remembered.

As described above, the compressed data decompression processing section is constituted by each of the above means, and the compressed data is decompressed to restore the image data.

[Action]

The video digital input signal A indicates the luminance of a pixel of an image. The video digital input signal A is compared with a threshold value B set to a desired value, and is a data obtained by discarding and compressing video data having a predetermined luminance or higher or lower than a predetermined luminance. Is stored. At the time of decompression, the discarded video data is supplemented with a default value G (predetermined luminance value).

By doing so, processing such as storage and editing with a small amount of data can be performed, the number of data stored in the storage device can be increased, and various processing can be speeded up.

〔Example〕

An embodiment of the present invention will be described with reference to the block diagram shown in FIG. FIG. 2 shows a hardware configuration that simply embodies the basic configuration of FIG. 1. Since each part corresponds to each other, only the configuration and operation will be briefly described. Also, for simplicity of description, one byte (byte) is set to eight bits (bit).

9 is a microcomputer with a threshold value B
And the default value G, and controls each part of the compression / decompression mechanism. Reference numeral 10 denotes a synchronization generation circuit which generates a clock signal for synchronizing each pixel and a synchronizing signal for synchronizing with a video signal. Reference numeral 11 denotes a timing generation circuit, which receives an instruction from the microcomputer 9 and clears an address counter synchronized with a clock signal and a synchronization signal, and performs serial / parallel (S / P) conversion and parallel / serial (P / S).
Generate a control signal for conversion. These components are not shown in FIG.

Video digital input signal A and threshold value B set in register 12 (corresponding to 3 in FIG. 1)
The output of the comparator 13 is input to the exclusive OR gate (XOR) 14 together with the selection signal C. The output of the XOR 14 corresponds to the output D of the comparison means 2 described with reference to FIG.

The comparator 13 outputs “1” if A> B, and outputs “0” if A ≦ B. If the other input of XOR14, that is, the selection signal C is, for example, "0", the output D becomes "1" when A> B. When the selection signal C is set to "1", the output D of the XOR 14 becomes "1" when A≤B in the comparison of the comparator 13.
That is, the comparator 13 and the XOR 14 set the comparison function by the selection signal C.

When the output D becomes "1", the video digital input signal A is written into the compressed data RAM 15 as compressed data F. Further, the address D of the address counter 16 of the compressed data RAM 15 is counted up by one because the output D is connected to the clock input via the switch 17.

To determine which pixel on the screen corresponds to the compressed data written in the compressed data RAM 15, the value of the output D is mapped (MA
P) Write to the map RAM 18 as data. Map RAM18
Address counter 19 counts up by one in response to a clock signal supplied from synchronization generation circuit 10. Here, since the map RAM 18 uses a RAM of 1 byte / address, in order to write eight pixels at a time, the serial / parallel (S /
P) A converter 20 is used. FIG. 3 shows the correspondence between the pixels constituting the screen, the map RAM, and the compressed data RAM.

At the time of decompression, map data for eight pixels is sequentially read from the map RAM 18 and the parallel / serial (P / S) converter 21 extracts map data for each pixel. Only when this output E is "1", the compressed data is read out from the compressed data RAM 15 and output as a video digital decompression output signal H using a multiplexer (MPX) 22 (corresponding to the switching means 6 in FIG. 1). When E is "0", register 23 (first
The default value set in (corresponding to 7 in FIG. 7) is output as a video digital expansion output signal. Also, the address counter 16 outputs the clock E to the switch 17 as the output E.
Is incremented by one.

As described above, high-speed compression / decompression is realized using a simple circuit.

〔The invention's effect〕

As described above, according to the present invention, image data can be compressed and decompressed at high speed with a simple circuit configuration, and the number of data stored in the storage device can be increased. In addition, by setting the threshold value and the default value, image data including a desired halftone level can be faithfully stored and stored, and an image having a desired contrast can be created at the time of reproduction. Therefore, it is effective for image filing in various fields.

For example, in an image filing apparatus in the medical field that handles X-ray images, MRI images, ultrasonic image data, and the like, it is also useful as a feature extraction unit in an image, and the effect of diagnosis is improved.

Further, an image filing apparatus mainly for handling character screens and the like, for example, an image filing apparatus for registering and verifying a seal used in a financial institution or the like can achieve high-speed processing and an improved compression ratio.

Compression of an image with a shade in a single color (for example, a seal) is performed by using the present invention in combination with the conventional one-dimensional coding compression logic (for example, MH coding in GIII facsimile).
A compression ratio of about 10 to 1/30 can be expected.

[Brief description of the drawings]

FIG. 1 is a functional block diagram of the present invention, FIG. 2 is a block diagram of an embodiment of the present invention, and FIG. 3 is a diagram showing correspondence between pixels constituting a screen and a map RAM and a compressed data RAM. 1 ... input terminal, 2 ... comparison means, 3 ... first storage means, 4 ... second storage means, 5 ... third storage means, 6 ... switching means, 7 ... fourth 8 ... Output terminal.

Claims (1)

(57) [Claims] 1. A video digital input signal obtained by digitizing an image signal is compared with a threshold value defining a condition for extracting compressed data from the video digital input signal. Comparing means for making active, first storing means for storing the threshold value, second storing means for storing the output state of the comparing means as map data,
An image data compression processing unit comprising third storage means for storing the video digital input signal as compressed data only when the output of the comparison means is active; and compressed data stored in the third storage means. 2 with the default value that defines the conditions for decompressing the compressed data
Switching means for switching the two inputs based on the map data from the second storage means and outputting as a video digital decompression output signal, and a fourth storage means for storing the default value. Image data compression / decompression processing unit
Extension mechanism.