JPS6435490A - Driving system for display device - Google Patents

Driving system for display device

Info

Publication number
JPS6435490A
JPS6435490A JP19123987A JP19123987A JPS6435490A JP S6435490 A JPS6435490 A JP S6435490A JP 19123987 A JP19123987 A JP 19123987A JP 19123987 A JP19123987 A JP 19123987A JP S6435490 A JPS6435490 A JP S6435490A
Authority
JP
Japan
Prior art keywords
data
register
shift register
display data
display
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP19123987A
Other languages
Japanese (ja)
Inventor
Toshiya Okura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP19123987A priority Critical patent/JPS6435490A/en
Publication of JPS6435490A publication Critical patent/JPS6435490A/en
Pending legal-status Critical Current

Links

Landscapes

  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

PURPOSE: To resolve such a defect that a part of data or the like of a preceding row remains on the screen of a display element even at the time of displaying a small-volume of data on a large-capacity screen by clearing all of contents of a shift register before input of next line display data to the shift register. CONSTITUTION: When each bit data of a shift register 6 is latched in a latch circuit 3 by a scanning signal 9 functioning as a latch signal, a clear signal generation circuit 14 sends a clear pulse 13 to a clear terminal 7 of the register 6 before input of display data 10 of the next line. Therefore, contents of the register 6 are all cleared when sending of display data is started, and display data of the preceding row doesn't remain. Consequently, only required data remains in the register even if the number of clock pulses in one scanning period is small, and unnecessary data is not displayed on the display element.
JP19123987A 1987-07-30 1987-07-30 Driving system for display device Pending JPS6435490A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19123987A JPS6435490A (en) 1987-07-30 1987-07-30 Driving system for display device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19123987A JPS6435490A (en) 1987-07-30 1987-07-30 Driving system for display device

Publications (1)

Publication Number Publication Date
JPS6435490A true JPS6435490A (en) 1989-02-06

Family

ID=16271215

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19123987A Pending JPS6435490A (en) 1987-07-30 1987-07-30 Driving system for display device

Country Status (1)

Country Link
JP (1) JPS6435490A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11296140A (en) * 1998-04-15 1999-10-29 Mitsubishi Electric Corp Device and method for driving plasma display panel

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11296140A (en) * 1998-04-15 1999-10-29 Mitsubishi Electric Corp Device and method for driving plasma display panel

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