KR890003229Y1 - Color signal speed processing circuit of crt display control device - Google Patents
Color signal speed processing circuit of crt display control device Download PDFInfo
- Publication number
- KR890003229Y1 KR890003229Y1 KR2019860003362U KR860003362U KR890003229Y1 KR 890003229 Y1 KR890003229 Y1 KR 890003229Y1 KR 2019860003362 U KR2019860003362 U KR 2019860003362U KR 860003362 U KR860003362 U KR 860003362U KR 890003229 Y1 KR890003229 Y1 KR 890003229Y1
- Authority
- KR
- South Korea
- Prior art keywords
- color
- signal
- attribute
- crt
- character
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G1/00—Control arrangements or circuits, of interest only in connection with cathode-ray tube indicators; General aspects or details, e.g. selection emphasis on particular characters, dashed line or dotted line generation; Preprocessing of data
- G09G1/28—Control arrangements or circuits, of interest only in connection with cathode-ray tube indicators; General aspects or details, e.g. selection emphasis on particular characters, dashed line or dotted line generation; Preprocessing of data using colour tubes
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
- G09G5/02—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the way in which colour is displayed
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
- G09G5/22—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of characters or indicia using display control signals derived from coded signals representing the characters or indicia, e.g. with a character-code memory
- G09G5/30—Control of display attribute
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0264—Details of driving circuits
- G09G2310/0297—Special arrangements with multiplexing or demultiplexing of display data in the drivers for data electrodes, in a pre-processing circuitry delivering display data to said drivers or in the matrix panel, e.g. multiplexing plural data signals to one D/A converter or demultiplexing the D/A converter output to multiple columns
Abstract
내용 없음.No content.
Description
제1도는 본 고안의 회로도이다.1 is a circuit diagram of the present invention.
* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings
1 : CRT콘트롤러 2 : 멀티플렉서1: CRT controller 2: multiplexer
3 : 디스플레이 램 4.9 : 쌍방향 버퍼3: display RAM 4.9: interactive buffer
5,10,11 : 랫치회로 6 : 문자발생기5,10,11: Latch circuit 6: Character generator
7 : 쉬프트레지스터 8 : 칼라어트리뷰트랩7: Shift register 8: Color attribute trap
12 : 멀티플렉서 13 : 중앙처리장치12: multiplexer 13: central processing unit
14 : 지연회로 CTL1-3DIR : 제어신호14: delay circuit CTL 1-3 DIR: control signal
VIDEO : 문자비디오신호 R, G, B, I : 지녹청색 및 중간휘도 신호VIDEO: Text video signal R, G, B, I: Cyan-blue and mid-luminance signal
OCLK : 캐랙더 클록: 쉬프트/로드신호OCLK: Carrader Clock : Shift / load signal
본 고안은 컴퓨터 본체의 문자출력에 따라 CRT화면에다 문자를 표시할 때 그 표시되는 문자자체의 색깔과 그문자의 바탕색깔에 대한 색신호로 문자표시를 속성처리(屬性處理)하므로써 CRT의 화면상에다마 다양한 색깔로 문자표시를 할 수 있도록 하는CRT표시제어장치의 색신호 속성처리회로에 관한 것이다.When the character is displayed on the CRT screen according to the character output of the computer main body, the present invention performs attribute processing of the character display by the color signal of the color of the displayed character itself and the background color of the character. The present invention relates to a color signal attribute processing circuit of a CRT display control device capable of displaying characters in various colors.
종래 단색광의 명암을 이용하여 CRT의 화면상에다 문자를 표시하도록 된 CRT표시제어장치에는 킴퓨터본체의 문자출력으로 문자발생기에서 문자모양을 발생시켜 CRT의 화면상에다 문자를 표시하도록 되어있는데, 이때 문자표시를 다양하게 하기 위해서 문자발생기의 출력신호에다 속성신호를 혼합하여 밑줄이나 반전, 깜박거림등의 속성처리를 하도록 되어있었다. 그러나 이러한 장치로는 CRT의 화면상에 문자의 색깔과 바탕색을 여러가지 색깔로 표시하기는 곤란하었고, 더구나 이러한 장치로 색신호를 속성처리하여 문자자체와 바탕색을 각각 속성저리할 수 있도록 된 것은 없었다. 그리고 문자의 색깔과 바탕색깔을 구분시켜 각각 여러가지 색깔로 표시되도록하기 위해서는 칼라/모노크롬 어트리뷰트 콘트롤러(Color/MonoCrome Attibute Controller)와 같은 값비싼 집적회로를 사용하는 한편, 그에 필요한 신호를 출력하는 고급 CRT콘트롤러를 사용하여야 하는데, 이렇게 하면 CRT표시제어장치의 구성이 복잡해지고 제품 가격도높아지게되는 단점이 있었다.In the CRT display control device which displays the characters on the screen of the CRT by using the contrast of the monochromatic light, the characters are generated by the character generator by the character output of the Kim computer main body, and the characters are displayed on the screen of the CRT. In order to vary the character display, the attribute signal is mixed with the output signal of the character generator to perform attribute processing such as underlining, inversion, and flickering. However, it was difficult to display the color and the background color of characters on the screen of the CRT in various colors. Moreover, these devices did not allow the attribute of the color signal and the background color to be processed separately. Advanced CRT controllers that use expensive integrated circuits such as Color / MonoCrome Attibute Controllers to output the necessary signals while distinguishing the color of the text from the background color and displaying them in various colors. In this case, the configuration of the CRT display control device is complicated and the product price is increased.
본 고안은 위와같은 실정에 비추어 안출된 것으로서, 단색광의 명암으로 문자를 표시하도록 하는 CRT표시제어장치에다 색신호의 테이터를 보관하는 어트리뷰트램과 랫치회로 및 멀티플렉서등으로 간단히 회로를 구성하여 문자를 표시하는 비디오신호를 출력시킬때 문자자체의 색깔과 그 바탕색깔에 대한 속성신호인 적, 녹, 청색신호를 출력시켜 다양한 색깔의 문자표시를 하도록 된 CRT표시제어장치의 색신호속성처리회로를 제공하고자함에 그목적이 있다.The present invention was conceived in view of the above situation, and the CRT display control device which displays characters in the light and shade of monochromatic light, and the attributes that store the data of the color signals, latch circuits and multiplexers, etc., simply configure the circuit to display the characters. When outputting video signal, we want to provide color signal attribute processing circuit of CRT display control device that displays characters of various colors by outputting red, green, and blue signals, which are attribute signals of the color itself and its background color. There is a purpose.
이하 본 고안은 구성및 작용, 효과를 예시도면에 의하여 상세히 설명하면 다음과 같다.Hereinafter, the present invention will be described in detail with reference to the configuration, operation, and effects as follows.
본 고안은 CRT콘트롤러(1)와 멀티플렉서(2), 디스플레이램(3), 쌍방향버퍼(4), 랫치회로(5), 문자발생기(6) 및 쉬프트레지스터(7)로 구성된 CRT표시제어장치에 있어서, 상기 디스플레이램(3)과 대응되게 제어신호(DlR)(CIL3)를 조합하는 오아게이트(OR)의 출력신호에 의해 기록이네이블되는 칼라어트리뷰트램(8)을 설치하고, 상기 어트리뷰트램(8)의 출력단(D0-D7)에는 시스템버스(SB)와 연결되는 쌍방향버퍼(9)와 랫치회로(10)를 병렬로 연결하며, 상기 랫치회로(10) 출력단(Q0-Q7)에는 랫치회로(11)를 매개하여 멀티플렉서(12)를 연결하여서 된 구조로 되어있다.The present invention is a CRT display control device comprising a CRT controller (1), a multiplexer (2), a display ram (3), a bidirectional buffer (4), a latch circuit (5), a character generator (6) and a shift register (7). And a color attribute ram (8) which is enabled for recording by the output signal of the OR gate (OR) combining the control signals (DlR) (CIL 3 ) corresponding to the display ram (3). Output terminals (D 0 -D 7 ) of (8) connect the bidirectional buffer 9 and the latch circuit 10 connected in parallel with the system bus SB in parallel, and output terminals Q 0 -Q of the latch circuit 10. 7 ) has a structure by connecting the multiplexer 12 via the latch circuit (11).
미설명부호 13은 중앙처리장치, 14는 지연회로.는 캐랙터클륵,는 쉬프트/로도신호, VIDEO는 문자 비디오 신호, R, G, B, I는 적, 녹,청색 및 중간휘도신호를 나타낸다.Reference numeral 13 is a central processing unit, and 14 is a delay circuit. Is a character, Is a shift / road signal, VIDEO is a text video signal, and R, G, B, and I are red, green, blue, and medium luminance signals.
제1도는 위와같은 구조로 된 본 고안의 회로도를 나타내는 것으로, CRT의 화면상에 문자를 표시하기 위해서는 중앙 처리장치(13)에서 멀티플렉서(2)와 쌍방향버퍼(4)를 통하여 디스플레이램(3)에다 문자에 대한 코드테이터를 저장하게 되는 데, 이에따라 CRT콘트롤러(1)에서는 멀티플랙서(2)를 통하여 디스플레이램(3)에 어드레스(MA)를 지정하여 코드 데이터를 출력시킨다음 캘랙터클록()에 의해 랫치회로(5)에 랫치시킨다. 다음에 랫치회로(5)의 출력신호인 문자에 대한 코드데이터와 CRT콘트롤러(1)의 스캔라인어드레스(RA)를 문자발생기(6)에 공급하게 되면 문자발생기(6)에서는 CRT화면상에 표시할 문자의 이미지 데이터를 출력시켜 쉬프트레지스터(7)에 공급한다. 쉬프트래지스터(7)에서는 쉬프트/로드신호()에 의해 병렬의 문자이미지데이터를 받아서 돗트클록(DOT CLK)에 의해 직렬의 비디오신호로 변환시킨다. 이와같은 직렬의 비디오신호가 지연회로(14)를 통해 CRT표시장치에 공급되어 CRT의 화면상에 문자를 표시하게 되는 것이다.1 is a circuit diagram of the present invention having the above structure, in order to display characters on the screen of the CRT, the display RAM 3 through the multiplexer 2 and the bidirectional buffer 4 in the central processing unit 13. In addition, the code data for the character is stored. Accordingly, the CRT controller 1 outputs the code data by designating the address MA to the display RAM 3 through the multiplexer 2 and then outputting the code data. Latches into the latch circuit (5). Next, when the code data for the character that is the output signal of the latch circuit 5 and the scan line address RA of the CRT controller 1 are supplied to the character generator 6, the character generator 6 displays them on the CRT screen. Image data of characters to be output is output and supplied to the shift register 7. In the shift register 7, a shift / load signal ( The parallel character image data is received by DELTA COLOR and converted into a serial video signal by DOT CLK. This serial video signal is supplied to the CRT display device through the delay circuit 14 to display characters on the screen of the CRT.
여기서 CRT의 화면상에 표시되는 문자나 그 바탕의 색깔을 여러가지로 표시하기 위해서는 칼라어트리뷰트램(8)에다 색신호에 대한 속성데이터를 디스플레이램(3)의 코드데이터의 번지수와 대응되게 기록시키고, 디스플레이램(3)의 코드데이터를 CRT콘트롤러(1)에 의해 출력시킬 때 칼라어트리뷰트램(3)의 색신호 속성데이터도같이 출력되도록 하여 문자에 대한 비디오신호가 출력될 때 그 문자와 바탕에 대한 적,녹,청색의 색신호(R) (G) (B)와 중간휘도신호(I)가 같이 출력되게 하므로써 다양한 색깔의 문자를 CRT의 화면상에다 표시할 수 있게 되는 것이다.Here, in order to display various characters displayed on the screen of the CRT or the background color thereof, the attribute data for the color signal is recorded in the color attribute tram 8 corresponding to the address number of the code data of the display ram 3 and displayed. When the code data of the RAM 3 is output by the CRT controller 1, the color signal attribute data of the color attribute RAM 3 is also output so that when the video signal for the character is output, the red, By displaying the green and blue color signals R, G, and B together with the intermediate luminance signal I, various colors of characters can be displayed on the screen of the CRT.
이를 구체적으로 설명하면 다음과 같다.This will be described in detail as follows.
먼저 칼라어트리뷰트램(8)에다 색신호에 대한 속성데이터를 기록하여 위해서는 속성처리하기 위한 문자의 코드 데이터가 저장된 디스플레이램(3)의 번지수와 같은 번지수에다 속성데이터를 저장하여야 하는데, 이 때 제어신호(CTL3) (DIR)가 로우레벨로 되어 오아게이트 (OR)를 통해 칼라어트리뷰트 램(8)을 기록이네이블상태로 만들고, 쌍방향버퍼(9)를 데이터가 시스템버스(SB)에서 칼라어트리뷰트램(8)쪽으로 전송되도록 제어한다.First, in order to record the attribute data for the color signal in the color attribute tram 8, the attribute data must be stored in the same address as that of the display RAM 3 in which the code data of the character for attribute processing is stored. The signal CTL 3 (DIR) goes low level, enabling the color attribute RAM (8) to be write-enabled via the oragate (OR), and the bidirectional buffer (9) with data on the system bus (SB). Control to be transmitted to the RAM (8).
이와같이 하여 칼라어트리뷰트램(8)에 색신호에 대한 속성데이터를 기록하게 되는데, 그 데이퍼의 내용을 보면 8비트의 데이터중 4비트(D0-D3)는 바탕색깔의 적. 녹. 청색(R) (G) (B)과 중간휘도신호(I)로 되고, 나머지 4비트(D4-D3)는 문자자체의 색깔이 각각 16가지의 색깥로 표현될 수 있는 것이다.In this way, the attribute data for the color signal is recorded in the color attribute tram (8). According to the contents of the data, 4 bits (D 0 -D 3 ) of the 8-bit data are the enemy of the background color. rust. It consists of blue (R) (G) (B) and the intermediate luminance signal (I), and the remaining four bits (D 4 -D 3 ) are each of the color of the character itself can be represented outside 16 colors.
CRT이 화면상에다 문자를 표시하기 위해 CRT콘트롤러(1)에서 어드레스(MA)를 출력하면 그어드레스에 해당하는 문자의 코드데이터가 디스플레이램(3)에서 출력됨과 더불어 칼라어트리뷰트램(8)에 저장된 색신호의,속성데이터가 출력된다.When the CRT outputs the address MA from the CRT controller 1 to display the characters on the screen, the code data of the character corresponding to the address is output from the display RAM 3 and stored in the color attribute RAM 8. Attribute data of the color signal is output.
이 속성데이터는 캘랙터클록()에 의하여 코드 데이터가 랫치회로(5)에 랫치되는 것과 동시에 랫치회로(10)에 랫치된다.This attribute data is displayed in the collector clock ( The code data is latched by the latch circuit 10 at the same time as the code data is latched by the latch circuit 5.
한편 문자발생기(6)에서 문자의 이미지데이터가 출력될때 이 신호를 직렬데이터로 변환시키기 위하여 쉬프트/로드신호 ()에 의해 쉬프트레지스터(7)에 공급할 때 동시에 색신호의 속성데이터도 랫치회로(11)에 랫치시킨다.On the other hand, when image data of a character is output from the character generator 6, a shift / load signal ( At the same time, the attribute data of the color signal is latched to the latch circuit 11 when supplied to the shift register 7.
랫치회로(11)에 랫치된 데이터(D0-D7)중에 4비트(D0-D3)는 바탕색깔을 의미하고 나머지 4비트는 문자자체의 색깔을 의미하므로 이를 구분해 주기 위해서 멀티플렉서(12)가 설치된다, 즉, 쉬프트레지스터(7)에시 출력되는 직렬의 데이터중에 하이레벨과 로우레벨신호로 문자자체와 그 바탕을 구분하게 되는데, 그 신호를 멀티플렉서(l2)의 셀렉트신호(S)로 사용하여 문자자체인 하이레벨신호가 출력될때 문자자체에 대한 색신호인 속성데이터 (D4-D7)가 출력되고, 그 바탕인 로우레벨신호가 출력될 때 바탕색깔에 대한 색신호인 속성데이터(D0-D3)가 출력되게 하므로써 이 멀티플렉서(12)의 출력신호인 색신호 속성데이터(R) (G) (B) (I)를 쉬프트레지스터(7)의 출력신호인 비디오신호와 함께 CRT표시장치에 공급하게되고, 이에 따라 CRT의 화면상에는 다양한 색깔의바탕위에 다양한 색깥의 문자가 표시되게 되는 것이다.Among the data (D 0 -D 7 ) latched in the latch circuit 11, 4 bits (D 0 -D 3 ) represent the background color and the remaining 4 bits represent the color of the character itself. 12), i.e., the character itself and its ground are distinguished by a high level and a low level signal among the serial data outputted to the shift register 7. The signal is selected by the select signal S of the multiplexer l2. When the high level signal, which is the character itself, is output, the attribute data (D 4 -D 7 ), which is the color signal for the character itself, is output, and the attribute data, which is the color signal for the background color, when the low level signal, which is the background, is outputted. By outputting D 0 -D 3 ), the color signal attribute data (R) (G) (B) (I), which are the output signals of this multiplexer 12, together with the video signal, which is the output signal of the shift register 7, is displayed as CRT. To the device, so that on the screen of the CRT Which it will be displayed in various character saekkkat rug on top of.
여기서 지연회로(14)는 쉬프트레지스터(7)의 출력비디오신호와 멀티플렉서(12)의 출력색속성신호의 타이밍을 일치시켜 주기 위해서 설치된다.The delay circuit 14 is provided to match the timing of the output video signal of the shift register 7 and the output color attribute signal of the multiplexer 12.
상기한 바와같이 본 고안은 단색광의 명암으로 문자를 표시하도록 된 CRT표시제어장치에다 램과 랫치외로및 멀티플렉서를 설치하여 문자표시를 색신호로 속성처리하므로써 다양한 색깔로 문자표시를 할 수 있게 되는장점이 있다.As described above, the present invention has the advantage of being able to display characters in various colors by attribute processing of the character display as color signals by installing a RAM, a latch, and a multiplexer in a CRT display control device which displays characters in contrast of monochromatic light. There is this.
Claims (1)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR2019860003362U KR890003229Y1 (en) | 1986-03-20 | 1986-03-20 | Color signal speed processing circuit of crt display control device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR2019860003362U KR890003229Y1 (en) | 1986-03-20 | 1986-03-20 | Color signal speed processing circuit of crt display control device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR870015276U KR870015276U (en) | 1987-10-24 |
| KR890003229Y1 true KR890003229Y1 (en) | 1989-05-17 |
Family
ID=19249716
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR2019860003362U KR890003229Y1 (en) | 1986-03-20 | 1986-03-20 | Color signal speed processing circuit of crt display control device |
Country Status (1)
| Country | Link |
|---|---|
| KR (1) | KR890003229Y1 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100262373B1 (en) * | 1996-12-25 | 2000-08-01 | 다카노 야스아키 | Apparatus for manufacturing carbonated water |
| KR20020096149A (en) * | 2001-06-18 | 2002-12-31 | 최식 | An electron valve auto control device for supplying water and/or draining |
-
1986
- 1986-03-20 KR KR2019860003362U patent/KR890003229Y1/en not_active IP Right Cessation
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100262373B1 (en) * | 1996-12-25 | 2000-08-01 | 다카노 야스아키 | Apparatus for manufacturing carbonated water |
| KR20020096149A (en) * | 2001-06-18 | 2002-12-31 | 최식 | An electron valve auto control device for supplying water and/or draining |
Also Published As
| Publication number | Publication date |
|---|---|
| KR870015276U (en) | 1987-10-24 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPS5830792A (en) | Green area controller for cathode ray tube screen | |
| EP0204821B1 (en) | Circuit means for converting digital signals representing color information into analog voltage level signals | |
| US4720803A (en) | Display control apparatus for performing multicolor display by tiling display | |
| KR890003229Y1 (en) | Color signal speed processing circuit of crt display control device | |
| US5633655A (en) | Television image processing apparatus | |
| KR850004817A (en) | Pixel increase circuit of bit-mapped video display | |
| KR910003195B1 (en) | Digital display system | |
| US4901062A (en) | Raster scan digital display system | |
| JPS5644887A (en) | Dot matrix electronic clock | |
| JPS643271B2 (en) | ||
| EP0073916B1 (en) | Circuit for individually controlling the color of the font and background of a character displayed on a color tv receiver or monitor | |
| KR930004904Y1 (en) | Computer display | |
| AU593975B2 (en) | Video display apparatus | |
| SU1508272A1 (en) | Device for displaying information on tv indicator screen | |
| KR940001380Y1 (en) | Horizontal scanning number changing device for monitor | |
| JPH0277793A (en) | Image display device | |
| SU1133615A1 (en) | Device for displaying information on screen of televison receiver | |
| SU1254537A1 (en) | Device for displaying information on television indicator | |
| SU1161986A1 (en) | Graphic information output device | |
| KR880000993B1 (en) | Rome use method for a fixed pattern | |
| SU1645991A1 (en) | Device to read data on crt display | |
| KR860002755A (en) | Display device for color images | |
| JP2811195B2 (en) | Display device | |
| KR900002793B1 (en) | Video pattern selecting circuit for crt display of picture and character | |
| JPS604988A (en) | Image display |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A201 | Request for examination | ||
| E701 | Decision to grant or registration of patent right | ||
| REGI | Registration of establishment | ||
| FPAY | Annual fee payment |
Payment date: 20000428 Year of fee payment: 12 |
|
| EXPY | Expiration of term |