JPS6433946A - Circuit board having low dielectric constant - Google Patents

Circuit board having low dielectric constant

Info

Publication number
JPS6433946A
JPS6433946A JP18872987A JP18872987A JPS6433946A JP S6433946 A JPS6433946 A JP S6433946A JP 18872987 A JP18872987 A JP 18872987A JP 18872987 A JP18872987 A JP 18872987A JP S6433946 A JPS6433946 A JP S6433946A
Authority
JP
Japan
Prior art keywords
fluoride resin
circuit board
dielectric constant
porous glass
low dielectric
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP18872987A
Other languages
Japanese (ja)
Inventor
Yuzo Shimada
Hideo Takamizawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP18872987A priority Critical patent/JPS6433946A/en
Publication of JPS6433946A publication Critical patent/JPS6433946A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/32115—Planarisation

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

PURPOSE:To obtain a circuit board, whose dielectric constant is made very low, for mounting high speed semiconductor elements and the like, by filling a porous glass structure with fluoride resin, and using a composite structure. CONSTITUTION:A porous glass structure 1 is filled with 4 fluoride resin 2,, and a composite structure is provided. For example, powder of borosilicate glass is crushed minutely, and the grain size is adjusted. Thereafter, plastic resin for forming a porous body is mixed. A binder is added thereto. Press molding is performed under the condition of 30kg/cm<2>. Then, a heating and baking step for decomposing and removing organic material is performed. Thereafter, sintering is performed at a temperature of 900 deg.C. When the molding is performed by laminating green sheets, which are formed by casting, the press conditions are made as follows: 110 deg.C and 20kg/cm<2>. Then the heated and fused fluoride resin is injected into the obtained porous glass by pressure reduction or application. Thus, a circuit board having low dielectric constant comprising the composite body of the porous glass structure 1 and the fluoride resin 2 is obtained.
JP18872987A 1987-07-30 1987-07-30 Circuit board having low dielectric constant Pending JPS6433946A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18872987A JPS6433946A (en) 1987-07-30 1987-07-30 Circuit board having low dielectric constant

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18872987A JPS6433946A (en) 1987-07-30 1987-07-30 Circuit board having low dielectric constant

Publications (1)

Publication Number Publication Date
JPS6433946A true JPS6433946A (en) 1989-02-03

Family

ID=16228756

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18872987A Pending JPS6433946A (en) 1987-07-30 1987-07-30 Circuit board having low dielectric constant

Country Status (1)

Country Link
JP (1) JPS6433946A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03159188A (en) * 1989-11-16 1991-07-09 Toshiba Chem Corp Board for printed circuit
US6800360B2 (en) 2001-02-08 2004-10-05 Sumitomo Electric Industries, Ltd. Porous ceramics and method of preparing the same as well as microstrip substrate
JP2006100472A (en) * 2004-09-29 2006-04-13 Rohm Co Ltd Semiconductor light emitting device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03159188A (en) * 1989-11-16 1991-07-09 Toshiba Chem Corp Board for printed circuit
US6800360B2 (en) 2001-02-08 2004-10-05 Sumitomo Electric Industries, Ltd. Porous ceramics and method of preparing the same as well as microstrip substrate
JP2006100472A (en) * 2004-09-29 2006-04-13 Rohm Co Ltd Semiconductor light emitting device

Similar Documents

Publication Publication Date Title
ZA868356B (en) Process for producing three-dimensional reinforcing elements from a meltable plastic powder or from a powder mixture containing a meltable plastic powder,and the application of these elements onto substrates,in particular shoe parts
GR900300186T1 (en) Method for making composite materials
JPS6433946A (en) Circuit board having low dielectric constant
KR960007505A (en) Manufacturing method of high density titanium carbide ceramic using preceramic polymer binder
JPS5555589A (en) Piezo-electric porcelain
JPS55100145A (en) Compression molding of emulsion polymer powder of tetrafluoruethylene resin
JPS5663811A (en) Manufacture of graphite composite material
JPS6442233A (en) Ceramic structure and method for preparation thereof
JPS6451937A (en) Laminated sheet for multi-layer printed wiring board
JPS5438279A (en) Production of strengthened forous membrabe
JPS5413571A (en) Production of composite structure
Engstrom et al. A Newly Developed Sintered High Strength Material
Boccaccini Sintering of glass powder compacts containing rigid inclusions
JPS51119056A (en) Production method of tetrafluoroethylene resin molded materials
JPS56105754A (en) Production of carrier for hydro-desulfurization catalyst
JPS5787188A (en) Manufacture of piezoelectric ceramics
JPS54146867A (en) Production of heat-resistant insulator
JPS5499014A (en) Hot hydrostatic pressing method using cured mold
JPS5584244A (en) Microwave hardening casting sand
JPS5296909A (en) Production of sintered product
JPS5414311A (en) Preparation of sintered product having complicated shape
JPS5426879A (en) Encapsulated electronic part
Kamagai et al. Ceramic Sintered Body
JPS54158486A (en) Non-combustible composite material
Gattuso et al. Insulating Ceramic Material