JPS643318U - - Google Patents
Info
- Publication number
- JPS643318U JPS643318U JP9722287U JP9722287U JPS643318U JP S643318 U JPS643318 U JP S643318U JP 9722287 U JP9722287 U JP 9722287U JP 9722287 U JP9722287 U JP 9722287U JP S643318 U JPS643318 U JP S643318U
- Authority
- JP
- Japan
- Prior art keywords
- amplifier
- circuit
- power supply
- terminals
- constant voltage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000003990 capacitor Substances 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Optical Recording Or Reproduction (AREA)
- Amplifiers (AREA)
- Optical Communication System (AREA)
Description
第１図はこの考案の一実施例を示す接続図、第
２図は従来回路の一例を示す接続図である。
２０はフオトダイオード、２１は定電圧発生回
路、２２は増幅器、２５〜２７は夫々第１〜第３
のトランジスタ、２９はコンデンサ、３４は抵抗
器、Ａは第１の端子、Ｂは第２の端子、Ｃは第１
の電源端子、Ｄは第２の電源端子である。
FIG. 1 is a connection diagram showing an embodiment of this invention, and FIG. 2 is a connection diagram showing an example of a conventional circuit. 20 is a photodiode, 21 is a constant voltage generating circuit, 22 is an amplifier, and 25 to 27 are first to third circuits, respectively.
, 29 is a capacitor, 34 is a resistor, A is a first terminal, B is a second terminal, and C is a first terminal.
, and D is the second power terminal.
Claims (1)
された電圧を発生する定電圧発生回路と、 直流負帰還回路と第１及び第２の電源端子と有
する増幅器とを備えた増幅回路において、 上記定電圧発生回路の第１の端子が上記増幅器
の第１の電源端子と共通接続され、 上記定電圧発生回路の第２の端子が上記増幅器
のベース又はゲートに入力信号が供給される初段
トランジスタのエミツタ又はソースに接続される
と共にコンデンサを介して上記第２の電源端子に
接続され、 上記増幅器の直流バイアスを決定するようにし
たことを特徴とする定電圧発生回路内蔵増幅回路
。[Claims for Utility Model Registration] A constant voltage generation circuit having first and second terminals and generating a stabilized voltage between the terminals, a direct current negative feedback circuit, and first and second power supply terminals. In the amplifier circuit, the first terminal of the constant voltage generating circuit is commonly connected to the first power supply terminal of the amplifier, and the second terminal of the constant voltage generating circuit is connected to the base of the amplifier or The regulator is connected to the emitter or source of a first-stage transistor whose gate is supplied with an input signal, and is also connected to the second power supply terminal via a capacitor to determine the DC bias of the amplifier. Amplifier circuit with built-in voltage generation circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9722287U JPS643318U (en) | 1987-06-23 | 1987-06-23 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9722287U JPS643318U (en) | 1987-06-23 | 1987-06-23 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS643318U true JPS643318U (en) | 1989-01-10 |
Family
ID=31322503
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9722287U Pending JPS643318U (en) | 1987-06-23 | 1987-06-23 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS643318U (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5348445A (en) * | 1977-10-20 | 1978-05-01 | Sony Corp | Transistor circuit |
-
1987
- 1987-06-23 JP JP9722287U patent/JPS643318U/ja active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5348445A (en) * | 1977-10-20 | 1978-05-01 | Sony Corp | Transistor circuit |
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