JPS6429970U - - Google Patents

Info

Publication number
JPS6429970U
JPS6429970U JP1987124144U JP12414487U JPS6429970U JP S6429970 U JPS6429970 U JP S6429970U JP 1987124144 U JP1987124144 U JP 1987124144U JP 12414487 U JP12414487 U JP 12414487U JP S6429970 U JPS6429970 U JP S6429970U
Authority
JP
Japan
Prior art keywords
circuit
digital data
control voltage
converts
pulse width
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1987124144U
Other languages
Japanese (ja)
Other versions
JPH0540619Y2 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1987124144U priority Critical patent/JPH0540619Y2/ja
Publication of JPS6429970U publication Critical patent/JPS6429970U/ja
Application granted granted Critical
Publication of JPH0540619Y2 publication Critical patent/JPH0540619Y2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Landscapes

  • Television Receiver Circuits (AREA)
  • Details Of Television Systems (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案の一実施例のブロツク図、第2
図は従来例のブロツク図である。 7…マイクロコンピユータ(出力手段)、8…
変換手段、9…不揮発性メモリ、10…クランプ
回路。
Fig. 1 is a block diagram of an embodiment of the present invention;
The figure is a block diagram of a conventional example. 7...Microcomputer (output means), 8...
Conversion means, 9... nonvolatile memory, 10... clamp circuit.

Claims (1)

【実用新案登録請求の範囲】 (1) 操作信号に応じて制御回路から出力される
データを、直流制御電圧に変換して被制御回路に
与える変換手段を備える機器における前記直流制
御電圧を補正する方式であつて、 前記直流制御電圧を補正するための補正信号に
応じて対応するデジタルデータを出力する出力手
段と、 前記出力手段からのデジタルデータの内の所望
のデジタルデータを記憶する記憶手段と、 前記出力手段からのデジタルデータまたは記憶
手段のデジタルデータに基づいて、前記直流制御
電圧を可変する可変手段とを備えることを特徴と
する直流制御電圧の補正方式。 (2) 前記変換手段は、制御回路からのデータを
パルス幅変調信号に変換するD/A変換回路と、
このD/A変換回路のパルス幅変調信号を直流制
御電圧に変換するフイルタ回路とを含み、 前記可変手段は、前記デジタルデータに応じた
クランプ電圧で前記パルス幅変調信号をクランプ
するクランプ回路であり、 該クランプ回路は、前記デジタルデータをパル
ス幅変調信号に変換するD/A変換回路と、この
D/A変換回路のパルス幅変調信号を直流電圧に
変換するフイルタ回路とを含むものである前記実
用新案登録請求の範囲第1項に記載の直流制御電
圧の補正方式。
[Claims for Utility Model Registration] (1) Correcting the DC control voltage in a device that is equipped with a conversion means that converts data output from a control circuit in response to an operation signal into a DC control voltage and supplies it to a controlled circuit. A method comprising: an output means for outputting digital data corresponding to a correction signal for correcting the DC control voltage; and a storage means for storing desired digital data from among the digital data from the output means. A method for correcting a DC control voltage, comprising: variable means for varying the DC control voltage based on digital data from the output means or digital data in the storage means. (2) The conversion means includes a D/A conversion circuit that converts data from the control circuit into a pulse width modulation signal;
and a filter circuit that converts the pulse width modulation signal of the D/A conversion circuit into a DC control voltage, and the variable means is a clamp circuit that clamps the pulse width modulation signal with a clamp voltage according to the digital data. , the clamp circuit includes a D/A conversion circuit that converts the digital data into a pulse width modulation signal, and a filter circuit that converts the pulse width modulation signal of the D/A conversion circuit into a DC voltage. A DC control voltage correction method according to claim 1.
JP1987124144U 1987-08-13 1987-08-13 Expired - Lifetime JPH0540619Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1987124144U JPH0540619Y2 (en) 1987-08-13 1987-08-13

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1987124144U JPH0540619Y2 (en) 1987-08-13 1987-08-13

Publications (2)

Publication Number Publication Date
JPS6429970U true JPS6429970U (en) 1989-02-22
JPH0540619Y2 JPH0540619Y2 (en) 1993-10-14

Family

ID=31373622

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1987124144U Expired - Lifetime JPH0540619Y2 (en) 1987-08-13 1987-08-13

Country Status (1)

Country Link
JP (1) JPH0540619Y2 (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56114482A (en) * 1980-02-14 1981-09-09 Sony Corp Controller
JPS6129276A (en) * 1984-07-19 1986-02-10 Matsushita Electric Ind Co Ltd Controller

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56114482A (en) * 1980-02-14 1981-09-09 Sony Corp Controller
JPS6129276A (en) * 1984-07-19 1986-02-10 Matsushita Electric Ind Co Ltd Controller

Also Published As

Publication number Publication date
JPH0540619Y2 (en) 1993-10-14

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