JPH03105098U - - Google Patents
Info
- Publication number
- JPH03105098U JPH03105098U JP1462990U JP1462990U JPH03105098U JP H03105098 U JPH03105098 U JP H03105098U JP 1462990 U JP1462990 U JP 1462990U JP 1462990 U JP1462990 U JP 1462990U JP H03105098 U JPH03105098 U JP H03105098U
- Authority
- JP
- Japan
- Prior art keywords
- preset
- initial
- restart
- writing
- memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000015654 memory Effects 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 6
Landscapes
- Tone Control, Compression And Expansion, Limiting Amplitude (AREA)
Description
第１図は本考案の原理図、第２図は本考案の実
施例の説明図、第３図は本考案のイニシヤル処理
のフローチヤート、第４図はオーデイオ装置の一
例を示すブロツク図、第５図は操作ＳＷの詳細図
、第６図は第４図のメインルーチンのフローチヤ
ート、第７図は第６図のＳＷ処理の詳細フローチ
ヤート、第８図は第４図のマイコンの要部メモリ
構成図である。
Fig. 1 is a diagram showing the principle of the present invention, Fig. 2 is an explanatory diagram of an embodiment of the invention, Fig. 3 is a flowchart of the initial processing of the invention, Fig. 4 is a block diagram showing an example of an audio device, and Fig. 4 is a block diagram showing an example of an audio device. Figure 5 is a detailed diagram of the operation SW, Figure 6 is a flowchart of the main routine in Figure 4, Figure 7 is a detailed flowchart of the SW processing in Figure 6, and Figure 8 is the main part of the microcomputer in Figure 4. FIG. 2 is a memory configuration diagram.
Claims (1)
数のプリセツトメモリを備え、リスタート時のイ
ニシヤル処理において共通の標準値ｓを基に一定
値ｋずつ値の異なる複数の初期値を算出して前記
各メモリに書込むことを特徴とするプリセツト装
置。 It is equipped with a plurality of preset memories in which setting values of acoustic characteristics can be individually preset, and in the initial processing at the time of restart, a plurality of initial values differing by a constant value k are calculated based on a common standard value s, and the above-mentioned A preset device characterized by writing to each memory.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1462990U JP2512507Y2 (en) | 1990-02-16 | 1990-02-16 | Preset device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1462990U JP2512507Y2 (en) | 1990-02-16 | 1990-02-16 | Preset device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH03105098U true JPH03105098U (en) | 1991-10-31 |
| JP2512507Y2 JP2512507Y2 (en) | 1996-10-02 |
Family
ID=31517979
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1462990U Expired - Fee Related JP2512507Y2 (en) | 1990-02-16 | 1990-02-16 | Preset device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2512507Y2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2010118205A (en) * | 2008-11-12 | 2010-05-27 | Oki Data Corp | Button-key structure and electronic device |
-
1990
- 1990-02-16 JP JP1462990U patent/JP2512507Y2/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2010118205A (en) * | 2008-11-12 | 2010-05-27 | Oki Data Corp | Button-key structure and electronic device |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2512507Y2 (en) | 1996-10-02 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| LAPS | Cancellation because of no payment of annual fees |