JPS6427256A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS6427256A JPS6427256A JP62184095A JP18409587A JPS6427256A JP S6427256 A JPS6427256 A JP S6427256A JP 62184095 A JP62184095 A JP 62184095A JP 18409587 A JP18409587 A JP 18409587A JP S6427256 A JPS6427256 A JP S6427256A
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- electrodes
- drain electrode
- onto
- areas
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Abstract
PURPOSE:To increase the areas of electrodes, to elevate current density in a substrate and to augment output currents by disposing the electrodes for a high-voltage drive semiconductor element while being divided into both surfaces of the substrate. CONSTITUTION:A DMOS transistor 3 is formed by doubly diffusing P layers 21 as channel forming regions and N<+> layers 22 as source regions to an N<-> layer 20 as a drain region. The DMOS transistor 3 has vertical type structure, and source electrodes 23 and a drain electrode 24 are arranged divided onto both surfaces of a substrate. That is, the source regions 23 are shaped onto the surface of the substrate 4, and the drain electrode 24 is formed onto the rear of the substrate 4. Accordingly, the area of the drain electrode 24 can be increased while a margin can be formed on the surface of the substrate 4 by transfer onto the rear from the surface of the substrate 4 of the drain electrode 24, thus also augmenting the areas of the source electrodes 23 and the areas of electrodes 12-17 in a C-MOS transistor 2.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62184095A JPS6427256A (en) | 1987-07-22 | 1987-07-22 | Semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62184095A JPS6427256A (en) | 1987-07-22 | 1987-07-22 | Semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6427256A true JPS6427256A (en) | 1989-01-30 |
Family
ID=16147305
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP62184095A Pending JPS6427256A (en) | 1987-07-22 | 1987-07-22 | Semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6427256A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5152393A (en) * | 1991-07-08 | 1992-10-06 | Advantek, Inc. | Microchip storage tape |
US5238110A (en) * | 1992-02-12 | 1993-08-24 | Nec Electronics Inc. | Secured PLCC package tray |
US5410171A (en) * | 1992-03-30 | 1995-04-25 | Nippondenso Co., Ltd. | Vertical type semiconductor with main current section and emulation current section |
-
1987
- 1987-07-22 JP JP62184095A patent/JPS6427256A/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5152393A (en) * | 1991-07-08 | 1992-10-06 | Advantek, Inc. | Microchip storage tape |
US5238110A (en) * | 1992-02-12 | 1993-08-24 | Nec Electronics Inc. | Secured PLCC package tray |
US5410171A (en) * | 1992-03-30 | 1995-04-25 | Nippondenso Co., Ltd. | Vertical type semiconductor with main current section and emulation current section |
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