JPS6425397A - Sample and hold circuit - Google Patents

Sample and hold circuit

Info

Publication number
JPS6425397A
JPS6425397A JP62181170A JP18117087A JPS6425397A JP S6425397 A JPS6425397 A JP S6425397A JP 62181170 A JP62181170 A JP 62181170A JP 18117087 A JP18117087 A JP 18117087A JP S6425397 A JPS6425397 A JP S6425397A
Authority
JP
Japan
Prior art keywords
pair
trs
sample
inputting
constituted
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62181170A
Other languages
Japanese (ja)
Inventor
Katsumi Hironaka
Hitoshi Udagawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP62181170A priority Critical patent/JPS6425397A/en
Publication of JPS6425397A publication Critical patent/JPS6425397A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To easily obtain an exact and high speed answer by making a circuit into a semiconductor integrated circuit, making a transistor (TR) into a same dimension and a same shape and equalizing a characteristic. CONSTITUTION:A sample and hold are repeated by inputting a sampling signal to be inputted into one side base terminal 7 of a pair of PNP type TR 3 constituted of TRs 1 and 2 and a pair of NPN TR 6 constituted of TRs 4 and 5, and by inputting a counter polarity sampling pulse into the other side base terminals 8 and 9 of the PNP type transistor pair 3 and the NPN type transistor pair 6. Since it is not necessary to utilize the saturated characteristic of transistors, the influence of the capacity quantity of TRs can be suppressed and a high speed answer can be obtained.
JP62181170A 1987-07-22 1987-07-22 Sample and hold circuit Pending JPS6425397A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62181170A JPS6425397A (en) 1987-07-22 1987-07-22 Sample and hold circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62181170A JPS6425397A (en) 1987-07-22 1987-07-22 Sample and hold circuit

Publications (1)

Publication Number Publication Date
JPS6425397A true JPS6425397A (en) 1989-01-27

Family

ID=16096110

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62181170A Pending JPS6425397A (en) 1987-07-22 1987-07-22 Sample and hold circuit

Country Status (1)

Country Link
JP (1) JPS6425397A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010168792A (en) * 2009-01-22 2010-08-05 Kanken:Kk Septic tank installation structure

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010168792A (en) * 2009-01-22 2010-08-05 Kanken:Kk Septic tank installation structure

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