JPS6421792A - Semiconductor storage device - Google Patents

Semiconductor storage device

Info

Publication number
JPS6421792A
JPS6421792A JP62178010A JP17801087A JPS6421792A JP S6421792 A JPS6421792 A JP S6421792A JP 62178010 A JP62178010 A JP 62178010A JP 17801087 A JP17801087 A JP 17801087A JP S6421792 A JPS6421792 A JP S6421792A
Authority
JP
Japan
Prior art keywords
inverse
signal
refresh operation
read write
strobing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62178010A
Other languages
Japanese (ja)
Inventor
Yukinobu Adachi
Kazutoshi Hirayama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP62178010A priority Critical patent/JPS6421792A/en
Publication of JPS6421792A publication Critical patent/JPS6421792A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To simplify refresh operation by executing the refresh operation by trailing a read write instruction signal in a standby state in which both the inverse of RAS and the inverse of CAS are High. CONSTITUTION:In the standby state, in which both the signal (the inverse of RAS) strobing a row address, and the signal (the inverse of CAS) strobing a column address, are high, the signal, the inverse of W instructing the read write comes to a low level from the High level, a transistor (TR) 1 turns off, and after delay time generated in an integration circuit 4 elapses, the TR 2 turns on. Accordingly, an internal counter signal is inputted, and an internal counter is generated, and that spot is refreshed. Thus, by only setting the time when the read write instruction signal, the inverse of W trails, the refresh operation can be executed, and time setting in the case of a system design becomes simple.
JP62178010A 1987-07-16 1987-07-16 Semiconductor storage device Pending JPS6421792A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62178010A JPS6421792A (en) 1987-07-16 1987-07-16 Semiconductor storage device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62178010A JPS6421792A (en) 1987-07-16 1987-07-16 Semiconductor storage device

Publications (1)

Publication Number Publication Date
JPS6421792A true JPS6421792A (en) 1989-01-25

Family

ID=16040981

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62178010A Pending JPS6421792A (en) 1987-07-16 1987-07-16 Semiconductor storage device

Country Status (1)

Country Link
JP (1) JPS6421792A (en)

Similar Documents

Publication Publication Date Title
DK189589D0 (en) PROCEDURE AND APPARATUS FOR PROVIDING ACCESS TO A SIDE DIVIDED STORAGE IN A COMPUTER
ATE283515T1 (en) MEMORY EXPANSION MODULE WITH A VARIETY OF MEMORY BANKS AND A BANK CONTROL CIRCUIT
KR900002306A (en) Refresh control circuit
DE3683705D1 (en) METHOD AND ARRANGEMENT FOR REFRESHING A DYNAMIC SEMICONDUCTOR STORAGE ARRANGEMENT.
JPS6442096A (en) Semiconductor memory
KR930010987A (en) Special mode control method of dynamic RAM
JPS61105795A (en) Memory circuit
KR970029795A (en) Semiconductor memory
KR950007089A (en) Semiconductor integrated circuit device with low power consumption signal input circuit responsive to high amplitude input signals with small amplitude
KR900002304A (en) Semiconductor memory
KR870000700A (en) Semiconductor memory
JPS6421792A (en) Semiconductor storage device
JPS6083293A (en) Dynamic ram
JPS60212896A (en) Dynamic ram
JPS6488994A (en) Storage device
JPS59129987A (en) Semiconductor memory
JPS55153194A (en) Integrated semiconductor memory unit
JPS57127993A (en) Semiconductor storage circuit
JPS57123596A (en) Semiconductor storage circuit device
JPS5720979A (en) Memory control system
JPH04111295A (en) Memory control circuit
ATE212469T1 (en) OFFSET TARGET LINE OPERATION IN A SINGLE RAS CYCLE
JPS6476597A (en) Semiconductor memory device
JPS6128320Y2 (en)
JPS57196332A (en) Microcomputer interface