JPS6421547A - Program bus measuring system - Google Patents

Program bus measuring system

Info

Publication number
JPS6421547A
JPS6421547A JP62177496A JP17749687A JPS6421547A JP S6421547 A JPS6421547 A JP S6421547A JP 62177496 A JP62177496 A JP 62177496A JP 17749687 A JP17749687 A JP 17749687A JP S6421547 A JPS6421547 A JP S6421547A
Authority
JP
Japan
Prior art keywords
address
dimensional display
bits
indicating
coordinate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62177496A
Other languages
Japanese (ja)
Inventor
Yoichi Takizawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP62177496A priority Critical patent/JPS6421547A/en
Publication of JPS6421547A publication Critical patent/JPS6421547A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To easily detect a fault of a program by selectively displaying a two-dimensional display and a three-dimensional display. CONSTITUTION:When the address of a statement accessed by a CPU 2 is inputted to an interface 21 through a bus 7, the address constituted of 16 bits e.g. is divided into high-order 8 bits and low-order 8 bits by an address bi-sected measuring part 25 and measured as coordinate information X, Y, corresponding to the divided addresses. A recording part 26 has a memory space corresponding to all proposed addresses and is accessed by an input address or 2 variables X, Y to record the number Z(X, Y) of times inputting the same address in each address. The two-dimensional display for indicating the existence of address input on an X-Y coordinate face and the three-dimensional display for displaying coordinate information X indicating the number of times inputting the same address on the X-Y coordinate face are selected. Consequently, the evaluation of program performance and the detection of a defect can be easily executed.
JP62177496A 1987-07-16 1987-07-16 Program bus measuring system Pending JPS6421547A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62177496A JPS6421547A (en) 1987-07-16 1987-07-16 Program bus measuring system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62177496A JPS6421547A (en) 1987-07-16 1987-07-16 Program bus measuring system

Publications (1)

Publication Number Publication Date
JPS6421547A true JPS6421547A (en) 1989-01-24

Family

ID=16031919

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62177496A Pending JPS6421547A (en) 1987-07-16 1987-07-16 Program bus measuring system

Country Status (1)

Country Link
JP (1) JPS6421547A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007328722A (en) * 2006-06-09 2007-12-20 Fujitsu Ltd Operational state monitoring program

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007328722A (en) * 2006-06-09 2007-12-20 Fujitsu Ltd Operational state monitoring program
US8122435B2 (en) 2006-06-09 2012-02-21 Fujitsu Limited Operating status monitoring program, method and device

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