JPS6421516U - - Google Patents
Info
- Publication number
- JPS6421516U JPS6421516U JP11479187U JP11479187U JPS6421516U JP S6421516 U JPS6421516 U JP S6421516U JP 11479187 U JP11479187 U JP 11479187U JP 11479187 U JP11479187 U JP 11479187U JP S6421516 U JPS6421516 U JP S6421516U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- operational amplifier
- amplifier
- resistor
- power supply
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000003990 capacitor Substances 0.000 claims description 2
- 230000010355 oscillation Effects 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Amplitude Modulation (AREA)
Description
第１図はこの考案による掃引回路の図、第２図
は従来の掃引回路を示す図である。図において１
はオペアンプ増幅回路、２はウイーンブリツジ発
振回路、３は直流電源、４は第１の抵抗器、５は
第２の抵抗器、６はコンデンサ、７は信号入力端
子、８は信号出力端子である。なお、図中同一符
号は同一あるいは相当部分を示す。
FIG. 1 is a diagram of a sweep circuit according to this invention, and FIG. 2 is a diagram of a conventional sweep circuit. In the figure 1
is an operational amplifier amplifier circuit, 2 is a Vienna Bridge oscillation circuit, 3 is a DC power supply, 4 is a first resistor, 5 is a second resistor, 6 is a capacitor, 7 is a signal input terminal, and 8 is a signal output terminal. be. Note that the same reference numerals in the figures indicate the same or corresponding parts.
Claims (1)
のオペアンプ増幅回路の出力端に接続され、オペ
アンプ増幅回路からの入力信号に掃引直流バイア
ス電圧を重畳するウイーンブリツジ発振回路と、
上記２つの回路に電源を供給する直流電源とで構
成された掃引回路において、オペアンプ増幅回路
に用いたオペアンプの非反転入力端子と接地点間
に、第１の抵抗器を付加し、オペアンプの非反転
入力端子と直流電源間に、第２の抵抗器及びコン
デンサを直列に付加したことを特徴とする掃引回
路。 an operational amplifier amplifier circuit that amplifies an input signal; a Wien Bridge oscillation circuit that is connected to the output terminal of the operational amplifier amplifier circuit and that superimposes a swept DC bias voltage on the input signal from the operational amplifier amplifier circuit;
In a sweep circuit configured with a DC power supply that supplies power to the above two circuits, a first resistor is added between the non-inverting input terminal of the operational amplifier used in the operational amplifier amplifier circuit and the ground point. A sweep circuit characterized in that a second resistor and a capacitor are added in series between an inverting input terminal and a DC power supply.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11479187U JPS6421516U (en) | 1987-07-27 | 1987-07-27 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11479187U JPS6421516U (en) | 1987-07-27 | 1987-07-27 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6421516U true JPS6421516U (en) | 1989-02-02 |
Family
ID=31355864
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11479187U Pending JPS6421516U (en) | 1987-07-27 | 1987-07-27 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6421516U (en) |
-
1987
- 1987-07-27 JP JP11479187U patent/JPS6421516U/ja active Pending