JPS6420786A - Scan converting circuit - Google Patents

Abstract

PURPOSE:To attain a format conversion between a television scan and a block scan by forming the generation of a read-out address from a counter-register and an adder. CONSTITUTION:A circuit is provided with a memory 20 to temporarily store an input television signal, first and second counters 11 and 12 to change in accordance with the block size of MXN, first, second and third registers 13-15 to store the updated value of a read-out address for the memory 20, a selecting circuit 16 to select one of the registers 13-15 by the counters 11 and 12, a fourth register 18 to store the read-out address for the memory 20, an adder 17 to add the output of the selection circuit 16 and the output of the fourth register 18, a means to store the output of the adder 17 into the fourth register 18 again and a third counter 19 to generate a writing address to the memory 20. Thus, a mutual conversion between a television scan and a block scan enabling a block size change by a simple address generating circuit can be obtained.