JPS6419795A - Flexible printed wiring board with multilayered pattern and manufacture thereof - Google Patents

Flexible printed wiring board with multilayered pattern and manufacture thereof

Info

Publication number
JPS6419795A
JPS6419795A JP62175765A JP17576587A JPS6419795A JP S6419795 A JPS6419795 A JP S6419795A JP 62175765 A JP62175765 A JP 62175765A JP 17576587 A JP17576587 A JP 17576587A JP S6419795 A JPS6419795 A JP S6419795A
Authority
JP
Japan
Prior art keywords
pattern
section
printed wiring
exposed
flexible printed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP62175765A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0252432B2 (enrdf_load_html_response
Inventor
Minoru Taguma
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
MIDORI MARK SEISAKUSHO KK
Original Assignee
MIDORI MARK SEISAKUSHO KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by MIDORI MARK SEISAKUSHO KK filed Critical MIDORI MARK SEISAKUSHO KK
Priority to JP62175765A priority Critical patent/JPS6419795A/ja
Priority to KR8712061A priority patent/KR920005462B1/ko
Publication of JPS6419795A publication Critical patent/JPS6419795A/ja
Publication of JPH0252432B2 publication Critical patent/JPH0252432B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
JP62175765A 1987-07-14 1987-07-14 Flexible printed wiring board with multilayered pattern and manufacture thereof Granted JPS6419795A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP62175765A JPS6419795A (en) 1987-07-14 1987-07-14 Flexible printed wiring board with multilayered pattern and manufacture thereof
KR8712061A KR920005462B1 (en) 1987-07-14 1987-10-30 Flexible printed wiring board with multilayered pattern and manufacturing process

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62175765A JPS6419795A (en) 1987-07-14 1987-07-14 Flexible printed wiring board with multilayered pattern and manufacture thereof

Publications (2)

Publication Number Publication Date
JPS6419795A true JPS6419795A (en) 1989-01-23
JPH0252432B2 JPH0252432B2 (enrdf_load_html_response) 1990-11-13

Family

ID=16001867

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62175765A Granted JPS6419795A (en) 1987-07-14 1987-07-14 Flexible printed wiring board with multilayered pattern and manufacture thereof

Country Status (2)

Country Link
JP (1) JPS6419795A (enrdf_load_html_response)
KR (1) KR920005462B1 (enrdf_load_html_response)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5234745A (en) * 1989-12-26 1993-08-10 Nippon Cmk Corp. Method of forming an insulating layer on a printed circuit board

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100494679B1 (ko) * 1998-12-18 2005-09-26 비오이 하이디스 테크놀로지 주식회사 플렉서블 프린티드 서킷
KR100395814B1 (ko) * 2000-11-14 2003-08-27 삼성에스디아이 주식회사 단선 방지형 유연성 프린트 회로

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4878470A (enrdf_load_html_response) * 1972-01-28 1973-10-22
JPS50135559A (enrdf_load_html_response) * 1974-04-17 1975-10-27
JPS6149491A (ja) * 1984-08-18 1986-03-11 松下電器産業株式会社 セラミツク多層配線基板
JPS6284975U (enrdf_load_html_response) * 1985-11-18 1987-05-30

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4878470A (enrdf_load_html_response) * 1972-01-28 1973-10-22
JPS50135559A (enrdf_load_html_response) * 1974-04-17 1975-10-27
JPS6149491A (ja) * 1984-08-18 1986-03-11 松下電器産業株式会社 セラミツク多層配線基板
JPS6284975U (enrdf_load_html_response) * 1985-11-18 1987-05-30

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5234745A (en) * 1989-12-26 1993-08-10 Nippon Cmk Corp. Method of forming an insulating layer on a printed circuit board

Also Published As

Publication number Publication date
JPH0252432B2 (enrdf_load_html_response) 1990-11-13
KR920005462B1 (en) 1992-07-04
KR890003269A (ko) 1989-04-13

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