JPS6419745A - Wafer scale integrated circuit device - Google Patents

Wafer scale integrated circuit device

Info

Publication number
JPS6419745A
JPS6419745A JP17479787A JP17479787A JPS6419745A JP S6419745 A JPS6419745 A JP S6419745A JP 17479787 A JP17479787 A JP 17479787A JP 17479787 A JP17479787 A JP 17479787A JP S6419745 A JPS6419745 A JP S6419745A
Authority
JP
Japan
Prior art keywords
lsis
numbers
wafer
yield
integrated circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17479787A
Other languages
Japanese (ja)
Inventor
Yoji Nishio
Akihiro Katsura
Takeshi Mizumura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP17479787A priority Critical patent/JPS6419745A/en
Publication of JPS6419745A publication Critical patent/JPS6419745A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203—Particular design considerations for integrated circuits
    • H01L27/0207—Geometrical layout of the components, e.g. computer aided design; custom LSI, semi-custom LSI, standard cell technique

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)

Abstract

PURPOSE:To make full use of the already accumulated design assets so that a wafer scale integrated circuit device to be operated at high speed with high reliability, yield and spacial efficiency may be provided by a method wherein the numbers of already developed custom LSIs required for constituting a system with the numbers of LSIs determined in consideration of the manufacturing yield of respective LSIs added thereto are spread on a wafer to supply only the acceptable LSIs with the power from the system power supply. CONSTITUTION:One chip facsimile system is formed of an LSI set comprising respective LSIs arranged on a wafer 1. Respective LSIs are prepared for the independent form to be contained in an ordinary package excluding a scribed region. Thus, already developed LSI conforming to and serviceable for the system need not be newly developed enabling design assets to be used effectively. Furthermore, the numbers of respective LSIs arranged on one wafer is provided with the redundancy exceeding 100% so that the LSIs discharging the same functions may be arranged in exceeding two times of the numbers required for the system to increase the yield as the set.
JP17479787A 1987-07-15 1987-07-15 Wafer scale integrated circuit device Pending JPS6419745A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17479787A JPS6419745A (en) 1987-07-15 1987-07-15 Wafer scale integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17479787A JPS6419745A (en) 1987-07-15 1987-07-15 Wafer scale integrated circuit device

Publications (1)

Publication Number Publication Date
JPS6419745A true JPS6419745A (en) 1989-01-23

Family

ID=15984835

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17479787A Pending JPS6419745A (en) 1987-07-15 1987-07-15 Wafer scale integrated circuit device

Country Status (1)

Country Link
JP (1) JPS6419745A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06295958A (en) * 1992-04-08 1994-10-21 Fu-Chieh Hsu Circuit module redundancy architecture

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06295958A (en) * 1992-04-08 1994-10-21 Fu-Chieh Hsu Circuit module redundancy architecture

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