JPS6413167U - - Google Patents
Info
- Publication number
- JPS6413167U JPS6413167U JP1987107388U JP10738887U JPS6413167U JP S6413167 U JPS6413167 U JP S6413167U JP 1987107388 U JP1987107388 U JP 1987107388U JP 10738887 U JP10738887 U JP 10738887U JP S6413167 U JPS6413167 U JP S6413167U
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- light emitting
- emitting device
- led
- led light
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 claims description 6
- 229910052782 aluminium Inorganic materials 0.000 claims 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims 1
- 229910052751 metal Inorganic materials 0.000 claims 1
- 239000002184 metal Substances 0.000 claims 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 238000010586 diagram Methods 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1515—Shape
- H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
Description
第１図は本考案によるＬＥＤ発光装置の一実施
例を示す断面図、第２図は第１図の平面図、第３
図ａ，ｂ，ｃはそれぞれ凹部の異なる例を示す断
面図、第４図は電気回路図、第５図および第６図
は従来例を示す断面図である。 １０……基板、１１……ＬＥＤ、１２……凹部
、１３……絶縁層、１４……金パツド、１５……
厚膜配線、１６……傾斜面、１７……底面、１８
……ペースト、１９……金線、２０……透明樹脂
、２１……電源。
例を示す断面図、第２図は第１図の平面図、第３
図ａ，ｂ，ｃはそれぞれ凹部の異なる例を示す断
面図、第４図は電気回路図、第５図および第６図
は従来例を示す断面図である。 １０……基板、１１……ＬＥＤ、１２……凹部
、１３……絶縁層、１４……金パツド、１５……
厚膜配線、１６……傾斜面、１７……底面、１８
……ペースト、１９……金線、２０……透明樹脂
、２１……電源。
Claims (1)
- 【実用新案登録請求の範囲】 (1) 複数個のＬＥＤを基板上に配列したＬＥＤ
発光装置において、前記基板は導電性と反射効果
を有する金属からなり、この基板の表面に、反射
面を兼ねたＬＥＤ搭載凹部を直接形成し、この凹
部の底面にＬＥＤを取付け、これらのＬＥＤを、
前記凹部以外の基板の表面に設けた厚膜配線に接
続してなることを特徴とするＬＥＤ発光装置。 (2) 基板はアルミニウムによつて形成したこと
を特徴とする実用新案登録請求の範囲第１項記載
のＬＥＤ発光装置。
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987107388U JPS6413167U (ja) | 1987-07-13 | 1987-07-13 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987107388U JPS6413167U (ja) | 1987-07-13 | 1987-07-13 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6413167U true JPS6413167U (ja) | 1989-01-24 |
Family
ID=31341755
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1987107388U Pending JPS6413167U (ja) | 1987-07-13 | 1987-07-13 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6413167U (ja) |
-
1987
- 1987-07-13 JP JP1987107388U patent/JPS6413167U/ja active Pending