JPS6412646A - Dpsk demodulation system - Google Patents

Abstract

PURPOSE:To facilitate the production of a control signal by using digital values of orthogonal component and in-phase component of a complex number low frequency signal as the address signal of the 1st memory storing an amplitude and a phase data and using the detected phase difference as the address signal of the 2nd memory storing a sign data corresponding to the phase difference. CONSTITUTION:The titled system consists of an input terminal 18, an automatic gain control (AGC) amplifier 19, an orthogonal demodulator 20, a local oscillator 21, low pass filters 22, 23, sample-and-hold circuits 24, 25, analog/digital converters 26, 27, address generators 28, 34, a shift register 32, memories (ROMs) 29, 35, an AGC amplifier controller 30, a digital/analog converter 31, a shift register 32, a digital adder 33 and an output terminal 36. Thus, neither analog delay circuit nor analog arithmetic unit is required, and the detected phase difference is used as the address of the 2nd storage means 35 and digital information corresponding to the phase difference is outputted, then even if a multi- value number is increased, the storage content of the storage means 35 has only to be rewritten without changing the circuit constitution. Thus, the production of the control signal is facilitated.