JPS6410966B2 - - Google Patents

Info

Publication number
JPS6410966B2
JPS6410966B2 JP13181082A JP13181082A JPS6410966B2 JP S6410966 B2 JPS6410966 B2 JP S6410966B2 JP 13181082 A JP13181082 A JP 13181082A JP 13181082 A JP13181082 A JP 13181082A JP S6410966 B2 JPS6410966 B2 JP S6410966B2
Authority
JP
Japan
Prior art keywords
adder
output
signal
cumulative sum
bit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP13181082A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5922427A (ja
Inventor
Shigechika Kawarai
Nobuo Furuya
Hitoshi Sekya
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Anritsu Corp
Original Assignee
Anritsu Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Anritsu Corp filed Critical Anritsu Corp
Priority to JP13181082A priority Critical patent/JPS5922427A/ja
Publication of JPS5922427A publication Critical patent/JPS5922427A/ja
Publication of JPS6410966B2 publication Critical patent/JPS6410966B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/3001—Arithmetic instructions

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Complex Calculations (AREA)
JP13181082A 1982-07-28 1982-07-28 累算装置 Granted JPS5922427A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13181082A JPS5922427A (ja) 1982-07-28 1982-07-28 累算装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13181082A JPS5922427A (ja) 1982-07-28 1982-07-28 累算装置

Publications (2)

Publication Number Publication Date
JPS5922427A JPS5922427A (ja) 1984-02-04
JPS6410966B2 true JPS6410966B2 (enrdf_load_stackoverflow) 1989-02-22

Family

ID=15066636

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13181082A Granted JPS5922427A (ja) 1982-07-28 1982-07-28 累算装置

Country Status (1)

Country Link
JP (1) JPS5922427A (enrdf_load_stackoverflow)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0624310B2 (ja) * 1984-06-22 1994-03-30 ソニー株式会社 デイジタルフイルタ
JPH0666638B2 (ja) * 1984-06-22 1994-08-24 ソニー株式会社 デイジタルフイルタ
JPS6387930U (enrdf_load_stackoverflow) * 1986-06-26 1988-06-08

Also Published As

Publication number Publication date
JPS5922427A (ja) 1984-02-04

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