JPS6399609A - Digital arithmetic circuit - Google Patents

Abstract

PURPOSE:To attain the characteristic, which executes the desired clipping operation, with a few logic circuits and a few control circuits by detecting an input value by means of a zero detection circuit and specifying an output value by means of an output switch circuit. CONSTITUTION:The input value which is represented by complements of '2' and composed of N-bits (N: optional integer greater than zero) is inputted, and M-bits (M: optional integer greater than zero and not greater than N) from the most significant bit of the input value is inputted. The zero detection circuit 4 judges whether the most significant bit and the subsequent M-bits of the input value are logical value '0'. When the result of judgement says that all of the M-bits are the logical value '0', the output switch circuit 6 regards the constant of N-bits '0' as an output value. If the result of the judgement says that one of the M-bits is not logical value '0', the output switch circuit regards the input value as an output value. Thus a few of control circuits can execute the clipping operation.

Description

Detailed Description of the Invention Field of the Invention The present invention relates to a nonlinear arithmetic circuit in digital signal processing, and provides a digital arithmetic circuit having a characteristic of clipping relatively low-level amplitude components of a digital signal. This is what I am trying to do.

Conventional technology In recent years, with the advancement of digital technology, logic elements, memory elements, etc. have become more integrated and faster, and as a result, digital signal processing methods are increasingly being introduced in place of conventional analog signal processing methods. . In digital signal processing techniques, signals are treated as numerical values expressed in binary, and these numerical values are processed by performing various operations. Nonlinear processing is one example of such digital signal processing. This nonlinear processing is literally performed by nonlinear calculations, but nonlinear calculations are generally more complex than addition calculations, etc. whose calculation algorithms are linear calculations. For this reason, a simple method is to use ROM (read-only memory).
Conventionally, a method called an arithmetic table reference method using a sequential read-only memory has been used. In the calculation table reference method using ROM, the desired nonlinear characteristics are determined in advance by R.
The input value is stored in the OM, and when the input value is given to the ROM, an output value corresponding to the nonlinear characteristic is output.

One of the non-linear processes using the above method is a clipping process that uses a constant "0" as the output value when the input value is within a predetermined value range, and uses the input value as the output value when the input value is outside the predetermined value range. There is.

This clip processing is used to remove minute amplitude noise from digital signals, etc. In particular, by using the calculation table reference method mentioned above, it is possible to perform flexible processing such as arbitrarily changing the desired characteristics, and analog signal processing has a big advantage over.

An example of a digital arithmetic circuit that performs clip processing using the conventional arithmetic table reference method described above will be described below with reference to the drawings.

FIG. 6 is a block diagram showing the configuration of a digital arithmetic circuit that performs clip processing using a conventional arithmetic table reference method, and FIG. 7 is a block diagram showing a specific example. Also,
FIG. 2 shows an example of input/output characteristics of clip processing. The solid line represents the input/output characteristics. In FIG. 6, 1 is an input terminal for inputting an input value, 9 is an output terminal for outputting an output value subjected to clip processing, and 2 is a clip processing circuit for performing clip processing using a conventional arithmetic table reference method. In Fig. 7, the same numbers as in Fig. 6 correspond to each other, and 2a is an RO that stores output values as data as shown in Fig. 2 at each address corresponding to the human power value.
M, 2b is the address terminal of ROM2a, and 2c is R
This is the data output terminal of OM.

The operation of the digital arithmetic circuit that performs clip processing using the arithmetic table reference method configured as described above will be described below. input terminal l and output terminal,
9 are connected to the address terminal 2b and data output terminal 2c of the ROM 2a, respectively.

The ROM 2a also stores output values as shown in FIG. 2 at each address corresponding to the input value from the input terminal 1 as data. From this, when an input value is first given to the input terminal 1, the address of the ROM 2a corresponding to the input value is selected. Since the output value as shown in FIG. 2 is stored in advance as data at this address, the input value is within the predetermined range (
In Figure 2, from “0” to “k”), the constant “O”
”, when the input value is outside the predetermined value range (“k” or more in FIG. 2), the input value can be obtained as the output value, thereby realizing the clipping process.

(Reference: Murakami, Enami: Color corrector, Journal of the Television Society, 33.4 (1979) P 291-295
) Problems to be Solved by the Invention However, in the above configuration, since a ROM is used, the capacity of the ROM increases as the number of bits of the input value increases. For example, if you try to introduce the above configuration into an LSI (Large Scale Integrated Circuit) for digital signal processing, the scale of the LSI will become very large. It had some problems.

In view of the above problems, the present invention provides a digital arithmetic circuit without increasing the number of elements constituting the digital arithmetic circuit, and in which an increase in the number of bits of an input value does not significantly affect the increase in the number of elements. It is.

Means for Solving the Problems In order to solve the above problems, the digital arithmetic circuit of the present invention inputs an input value in two's complement representation of N pitches (N is any integer greater than or equal to 0), Input M bits (M is any integer greater than or equal to 0 and less than or equal to N) from the most significant bit of the human input value, and determine whether all M bits from the most significant bit of the input value are logical “0”; A zero detection circuit outputs the judgment result, and the input value and the judgment result from the zero detection circuit are input, and the judgment result from the zero detection circuit is such that all M bits from the most significant bit of the input value are logical values. “
If it is 0, the N-bit constant "0" is set as the output value, and the judgment result from the zero detection circuit is that even one of the M bits from the most significant bit of the input value is not a logical value "O". If there is a bit, the output switch circuit outputs the input value as the output value.

Operation The present invention has the above-described configuration. First, when the input value expressed in two's complement representation is a relatively small value, the logic value of the upper bit of the input value is a continuous "0", and the zero detection circuit detects the It detects whether the logic values of the upper bits of the input value are all 0", and if they are all "0", the output switch circuit sets the constant "O" as the output value, and even one logic value is "0".
If there is a bit that is not "," the input value is made the output value by the output switch circuit, thereby achieving the characteristic of performing the desired clipping process with a small number of logic circuits and control circuits.

Example Below, regarding a digital arithmetic circuit according to an example of the present invention,
This will be explained using drawings.

FIG. 1 is a block diagram showing the configuration of a digital arithmetic circuit that performs clip processing according to the present invention. In FIG. 1, I is an input terminal to which an input value 10 in two's complement representation of N bits (N is any integer greater than or equal to 0) is input. Normally, N-bit natural binary representation means that a positive integer X from zero to 2N-1 is represented by an N-bit code X.

(i=l~N) to create a code string (X I + XZ
t X3...XN), ■
, 1) Expressed as i=1. Further, hereinafter, X will be referred to as the most significant bit, and XN will be referred to as the least significant bit. Here, the N-bit two's complement representation means that the negative value -Y of a positive integer Y from zero to 2 (N-1) is expressed as a code string ( 3'
+'+3'2'+y3'...y
,,'), zero to 2(N
A code string (y++Yz+
Logically invert each sign of y3...yn) and add 1 to the code string (yI', Yz', Y3'
...y,,').

For example, to represent the positive integer "3" in 5-bit natural binary representation, use the code example (00011), and to represent the negative value "-1" in 5-bit two's complement representation, use the code example (111).
11).

4 is a zero detection circuit, input the zero detection circuit input value 100 which is M pips I- (M is any integer greater than or equal to 0 and less than or equal to N) from the most significant bit of the input value 10, and this zero detection circuit It is determined whether all bits of the human input value 100 have a logical value of "0", and the determination result is outputted as the zero detection circuit output 49.

6 is an output switch circuit, which inputs the zero detection circuit output 49 and the input value 10, and the switch 6S determines that the judgment result of the zero detection circuit output 49 is such that all bits of the zero detection circuit human power value 100 are set to the logical value "0". ”, the N-bit constant “0” is set as the output value 60, and the zero detection circuit output 49
If the judgment result is that there is even one bit that is not a logic value "0" among the bits of the input value 100 of the zero detection circuit, the human input value 10 is set as the output value 60. Reference numeral 9 denotes an output terminal which outputs an output value 60 which has been subjected to clip processing.

The operation of the digital arithmetic circuit configured as above that performs clip processing will be described below with reference to FIGS. 1 and 2.

First, FIG. 2 shows the input/output characteristics of the digital calculation circuit that performs the clipping process of the present invention. In other words, if the input value is “
The output value is “0°” from “0” to “k”, and “k
``The output value is equal to the input value.

Here, the number of bits of input value 10 is N, the number of bits of zero detection circuit input value 100 is M, and the range for clipping is "
If "k" is "k"=2H-M, then below "k", the M focus portion from the upper bit of the human power value 10, that is, each bit of the zero detection circuit human power 100, is all logical value "0". Set each bit of the upper M bits of input value 10 to logical value “0” or “1”
”, and if they are all “0”, set the constant “0” to the output value 60, otherwise set the input value 10 to the output value 60, thereby obtaining the input/output characteristics shown in Figure 2. Can be done.

Now, when an N-bit input value 10 is given to the input terminal 1, the zero detection circuit input value 100 corresponding to M pits is inputted to the zero detection circuit 4 from the most significant bit of the input value 10.

The zero detection circuit 4 judges whether or not all bits 1, 1 of the zero detection circuit input value 100 have the logical value "0".The result of this judgment is that all the bits have the logical value "0".
or if even one of the pins is not logical “0”
If so, it is outputted to the output switch circuit 6 as a zero detection circuit output 49. In other words, zero detection circuit input value 10
If all bits of 0 are logical value ``0'', the input value 10 is less than ``k'' due to the above reason, so the constant ``0'' is set.
” is the output value 60, otherwise the input value is 10, “k”
Therefore, by setting the human power value of 10 to the output value of 60, desired clipping characteristics can be obtained. This process is performed by the output switch circuit 6 described below. The output switch circuit 6 inputs the zero detection circuit output 49 and the input value 10, and uses the switch 6S to switch the output when all bits of the zero detection circuit input value 100 are logical "0" in the judgment result of the zero detection circuit output 49. is a constant "'O" in advance
The constant 6k that has been memorized is translated into a selected book, and the judgment result of the zero detection circuit output 49 shows that even one of the 100 bits of the zero detection circuit input value has a logical value of "0".
If there is a pin that is not "0", input value 10 is selected, and this selected value is output as output value 60. k”
The range up to is a constant "0", and above "k", the input value is 10, and as a result, the input value is 10 and the output value is 600 Å.The output characteristics are as shown by the solid line in FIG. Zero detection circuit 4
can be easily realized by a logic element, the constant 6 of the output switch circuit 6 by a register, and the switch 6S of the output switch circuit 6 by a multiplexer.

As described above, according to this embodiment, the zero detection circuit 4 detects each of the M pits from the most significant bit of the input value 10.
Determine whether the logical value to is “0” or “1”, and all are “0”
In this case, by utilizing the fact that the input value 10 is less than "k", the output switch circuit 6 changes the determination result of the zero detection circuit 4 so that all bits of the zero detection circuit input value 100 have a logic value of "0". ”, the constant “0” is set as the output value 60, and if there is even one bit that is not the logical value “0” among the bits of the zero detection circuit input value 100, the input value 10 is set as the output value 60. As a result, a digital arithmetic circuit having input/output characteristics for performing rip processing as shown by the solid line in FIG. 2 can be realized with a small number of control circuits.

FIG. 3 is a block diagram showing a specific example of a digital arithmetic circuit that performs clip processing according to the present invention.

Here, in order to make the explanation easier to understand, the number of bits of the input value 10, constant 6k, and output value 60 in FIG.
An example will be explained in which the number of bits is 3 bits. Here, "k" in FIG. 2 is k"-2N-O-4", and the range to be clipped is from "0" to "3". In FIG. 3, the same numbers as in FIG. 1 correspond to each other. Input lines 11 to 15 in FIG. 3 correspond to input value 10 in FIG.
is the most significant bit, input line 15 is the least significant bit,
Input lines 11-15 represent a 5-bit input value 10. Similarly, an output value of 6° is represented by output lines 61-65. 6a to 6e are multiplexers; 4a to 6e are multiplexers;
are NOR gates, and their input/output logic is shown in FIG.

A specific example of the digital arithmetic circuit configured as described above that performs clip processing will be described.

First, input value 10 in two's complement representation of 5-pix I is input from input terminal 1 through inputs 'ffAl1-15. The input lines 11 to 13 are also input to the zero detection circuit 4. In this specific example, the zero detection circuit 4 is realized by a NOR gate 4a. That is, the zero detection circuit output 49 has a logic value of "1" only when the logic values of the input lines 11 to 13 are all "0". Now, in this specific example, the range for clipping is “0”.
” to “3”, ’O
Input value 10 from '' to 3'' is expressed as (00000) to (00011) by input lines 11 to 15, and only in this range, the logical values of input lines 11 to 13 are all ``0'', which is NOR game. 4a, it is possible to detect the range in which the desired clipping process is to be performed.The output of the NOR gate 4a is output as the zero detection circuit output 49 to the output switch circuit 6, and is connected to the select terminals S of the multiplexers 6a to 6e. With the multiplexer logic as shown, N
When the output of the OR gate 4a is a logical value "1", a 5-bit constant "0" is selected, and when the output of the NOR gate 4a is a logical value "0", input lines 11-15 are selected, and output lines 61-15 are selected. It is output to the output terminal 9 through 65.

In this specific example, "k" in FIG.
- An input/output characteristic that performs rip processing is obtained, such as "3".

FIG. 5 specifically shows a comparison of the human power value 10, the zero detection circuit output 49, and the output value 60 in this specific example.

In this specific example, the number of input/output bits is 5 pins, and the number of pins of the zero detection circuit input is 3 bits, but this is an example to make the explanation easier to understand, and the number of input/output bits and the desired clip Depending on the processing characteristics, the number of hints input to the multiplexer and zero detection circuit may be increased or decreased. In addition, in this specific example, the zero detection circuit 4 is
However, any method that can determine whether all the logical values of the input values of the seven-lo detection circuit are "0" may be used.

Effects of the Invention As described above, the present invention inputs an input value in two's complement representation of N bits (N is any integer greater than or equal to 0), and converts the most significant bit of the input value to M bits (M is 0). 2, any integer less than or equal to N), the zero detection circuit determines whether all M bits are logical "0" from the most significant bit 1- of the input value, and the output switch circuit outputs the determination result. If all M bits from the most significant bit of the input value are logical “0”, the N-bit constant “0” is set as the output value, and the judgment result is 1 among the M pintos from the most significant bit of the input value. If there is a pitch Y that does not have a logical value of ``0'' at any time, the input value is set as the output value.
Furthermore, an increase in the number of bits of an input value does not have a large effect on an increase in the number of elements, and an excellent effect can be obtained in that a digital arithmetic circuit that performs clip processing can be realized with a small number of control circuits.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a digital arithmetic circuit according to an embodiment of the present invention, FIG. 2 is an input/output characteristic diagram showing the input/output characteristics of the digital arithmetic circuit of the present invention, and FIG. 3 is a block diagram of a digital arithmetic circuit according to an embodiment of the present invention. A block diagram of a digital arithmetic circuit, FIG. 4 is an input/output characteristic diagram comparing input and output values of a specific example of the present invention, FIG. 5 is a logic diagram showing the logic of each logic element in FIG. 3,
Figure 6 shows the configuration of a conventional digital arithmetic circuit.
7 is a process diagram showing a specific example of FIG. 6. 1...Input terminal, 2...Conventional digital arithmetic circuit, 4...Zero detection circuit, 6...
...Output switch/nochi circuit, 9...Output terminal. Name of agent: Patent attorney Toshio Nakao (1 person) Figure 4 Figure 5 Figure 6?

Claims (1)

[Claims] Input an input value in two's complement representation of N bits (N is any integer greater than or equal to 0), input M bits (M is any integer greater than or equal to 0 and less than or equal to N) from the upper bits of the input value, a zero detection circuit that determines whether all M bits have a logical value "0" from the upper bits of the input value and outputs the determination result; If the judgment result from the zero detection circuit is that all M bits from the upper bits of the input value are logical "0", the N-bit constant "0" is set as the output value, and the judgment result from the zero detection circuit is A digital arithmetic circuit comprising an output switch circuit which sets the input value as an output value when there is even one bit among the M bits higher than the upper bits of the input value that does not have a logical value of "0".