JPS6396968A - Manufacture of semiconductor photodetector - Google Patents

Manufacture of semiconductor photodetector

Info

Publication number
JPS6396968A
JPS6396968A JP61243641A JP24364186A JPS6396968A JP S6396968 A JPS6396968 A JP S6396968A JP 61243641 A JP61243641 A JP 61243641A JP 24364186 A JP24364186 A JP 24364186A JP S6396968 A JPS6396968 A JP S6396968A
Authority
JP
Japan
Prior art keywords
layer
type
inp
ingaas
band
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP61243641A
Other languages
Japanese (ja)
Inventor
Kikuo Makita
紀久夫 牧田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP61243641A priority Critical patent/JPS6396968A/en
Publication of JPS6396968A publication Critical patent/JPS6396968A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/08Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
    • H01L31/10Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by at least one potential-jump barrier or surface barrier, e.g. phototransistors
    • H01L31/101Devices sensitive to infrared, visible or ultraviolet radiation
    • H01L31/102Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier or surface barrier
    • H01L31/107Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier or surface barrier the potential barrier working in avalanche mode, e.g. avalanche photodiode
    • H01L31/1075Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier or surface barrier the potential barrier working in avalanche mode, e.g. avalanche photodiode in which the active layers, e.g. absorption or multiplication layers, form an heterostructure, e.g. SAM structure

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Light Receiving Elements (AREA)

Abstract

PURPOSE:To be able to form a modified layer which does not form a large discontinuous band between an InGaAs optical absorption layer and an InP multiplying layer with good controllability thereby to obtain a high speed optical responding characteristic by forming a layer structure on a substrate and then heat treating it in a high temperature atmosphere. CONSTITUTION:An n-type InP buffer layer 2, an n-type InGaAs optical absorption layer 3, an n-type InGaAsP layer 4, an n-type InP multiplying layer 5, and an n-type InP cap layer 6 are obtained by a halide vapor growing method on an N-type InP substrate 1. Then, it is heat treated at 650 deg.C or higher in a phosphorus pressure atmosphere, a P-type photodetector region and a P-type guard ring region are formed by a diffusing method, an SiO2 film and electrodes are thereafter formed to obtain a photodetector. As a result, an InxGa1-xAsyP1-y modified layer which is modified from InGaAs to InP in a band structure is obtained, and holes implanted to the InP multiplying layer 5 do not feel a large band discontinuity.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、半導体受光素子に関し、特に1〜1.6μm
帯領域において高性能を有するアバランシェ増倍型受光
素子の製造方法に関するものである。
[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a semiconductor light receiving element, particularly a semiconductor light receiving element with a diameter of 1 to 1.6 μm.
The present invention relates to a method of manufacturing an avalanche multiplication type light receiving element having high performance in a band region.

〔従来の技術〕[Conventional technology]

従来、1〜1.6μm帯の光通信用半導体受光素子とし
てInP基板上に格子整合したIno−5sG a 0
.47A 8層(以下I nGaAs層と略す)を光吸
収層とする受光素子や光伝導素子が知られている。
Conventionally, Ino-5sG a 0 lattice-matched on an InP substrate has been used as a semiconductor photodetector for optical communication in the 1-1.6 μm band.
.. 2. Description of the Related Art A light-receiving element and a photoconductive element having a 47A 8 layer (hereinafter abbreviated as an InGaAs layer) as a light absorption layer are known.

特に、この中でアバランシェ増倍型受光素子は、アバラ
ンシェ増倍作用による内部利得効果及び高速応答を有す
る点で長距離光通信用として注目されている。第4図は
、従来のアバランシェ増倍型素子の一般的な構造例を示
す断面図である。
In particular, avalanche multiplication type light receiving elements are attracting attention for use in long-distance optical communications because they have an internal gain effect due to avalanche multiplication and high-speed response. FIG. 4 is a cross-sectional view showing a general structural example of a conventional avalanche multiplication type element.

ここで、層構造としてはn型InP基板1上に、n型I
nPバッファ層2.n型1 nGaAsGaAs光吸収
型3nP増倍層5.n型キャップ層6から成り立ってい
る。この様な層構造において受光部であるP型頭域7.
ガードリング部であるP壁領域8を図の様に形成する事
によってアバランシェ増倍型受光素子の基本構造が得ら
れる。基本的な原理としては、入射光が光吸収層I n
GaAs層3で吸収される事により電子と正孔が発生し
、逆バイアス印加による電界により正孔がInP増倍層
5に注入され、さらにイオン化によるアバランシェ増倍
により内部利得が得られることになる。
Here, as a layer structure, n-type I
nP buffer layer 2. n-type 1 nGaAsGaAs light absorption type 3nP multiplication layer5. It consists of an n-type cap layer 6. In such a layered structure, a P-shaped head area 7 which is a light receiving part is formed.
By forming the P wall region 8, which is a guard ring portion, as shown in the figure, the basic structure of an avalanche multiplication type light receiving element is obtained. The basic principle is that the incident light is absorbed by the light absorption layer I n
Electrons and holes are generated by being absorbed by the GaAs layer 3, and the holes are injected into the InP multiplication layer 5 by the electric field applied with a reverse bias, and internal gain is obtained by avalanche multiplication due to ionization. .

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

上述した従来のアバランシェ増倍型受光素子の光応答特
性に影響を与えるものとして、I nGaAs層3とI
nP層5の価電子帯側の大きな不連続性(エネルギーに
して0.385eV程度)がある、これは、光吸収層で
発生した正孔がInP増倍層に注入される場合に界面近
傍でトラップされ光応答において遅い成分となる。この
為、一般的には、I nGaAs層3とInP層5の間
にInGaAsPnGaAs層3により価電子帯の不連
続性を緩和する工夫がなされ、例えば、アイイーイーイ
ー・エレクトロン・デバイス・レターズ(IEEE、E
lectron  DeviceLett、)1986
.7.pp257〜258に発表されている。しかし、
この場合も十分な効果が期待できない、理想的には、除
々にバンド構造がInGaAsからInPにかわるIn
XGa1−X P y AS 1−y変成層を介在させ
る事が望まれる。しかしながら、結晶成長の問題上格子
整合した高品質な層を形成する事は不可能である8本発
明の目的は、これらの問題点を解決して、InGaAs
光吸収層とInP増倍層の間に大きなバンド不連続が生
じない変成層を制御性良く得ることのできるアバランシ
ェ増倍型の半導体受光素子の製造方法を提供することに
ある。
The I nGaAs layer 3 and I
There is a large discontinuity (approximately 0.385 eV in energy) on the valence band side of the nP layer 5. This is because holes generated in the light absorption layer are injected into the InP multiplication layer near the interface. It is trapped and becomes a slow component in the photoresponse. For this reason, in general, measures are taken to alleviate the discontinuity in the valence band by providing an InGaAsPnGaAs layer 3 between the InGaAs layer 3 and the InP layer 5. ,E
lectron Device Lett, ) 1986
.. 7. Published on pp 257-258. but,
In this case as well, a sufficient effect cannot be expected; ideally, the band structure of InGaAs gradually changes to InP.
It is desirable to have an intervening XGa1-X P y AS 1-y metamorphic layer. However, it is impossible to form a high-quality layer with lattice matching due to problems with crystal growth.8 The purpose of the present invention is to solve these problems and
It is an object of the present invention to provide a method for manufacturing an avalanche multiplication type semiconductor light-receiving element that can obtain a metamorphic layer with good controllability without causing large band discontinuity between a light absorption layer and an InP multiplication layer.

〔問題点を解決するための手段〕[Means for solving problems]

本発明の半導体受光素子の製造方法は、半導体基板上に
光吸収層である第一の半導体層を形成する工程とアバラ
ンシェ増倍層である第2の半導体層を形成する工程とを
含んで層構造を形成する半導体受光素子の製造方法にお
いて、前記層構造を形成した後650℃以上の高温雰囲
気で熱処理する工程を付加することにより構成される。
The method for manufacturing a semiconductor light receiving element of the present invention includes the steps of forming a first semiconductor layer as a light absorption layer on a semiconductor substrate and a step of forming a second semiconductor layer as an avalanche multiplication layer. A method for manufacturing a semiconductor light receiving element in which a structure is formed includes adding a step of heat treatment in a high temperature atmosphere of 650° C. or higher after forming the layered structure.

〔作用〕[Effect]

本発明は、上述の手段をとることにより従来技術の問題
点を解決した0本発明では、InPとInGa、As(
P)との相互拡散が650℃以上で顕著であることを見
いだした。これに着目して。
The present invention solves the problems of the prior art by taking the above-mentioned means. In the present invention, InP, InGa, As(
It has been found that interdiffusion with P) is significant at temperatures above 650°C. Pay attention to this.

前述した層構造に高温雰囲気中で熱処理を行っている。The layered structure described above is heat treated in a high temperature atmosphere.

これによりTnPとI n G a A s (P )
層の界面近傍でI n、Ga、As、P等の原子種の拡
散が容易に生じ、バンド構造がI nGaAsからIn
Pに変わるI n、Ga1−、AsyPI−X変成層が
実現できる、この様子を第3図に示す、この為、InP
増倍層に注入される正孔が大きなバンド不連続性を感じ
る事がないので、高速な光応答特性が可能になる。
This allows TnP and InGaAs (P)
Diffusion of atomic species such as In, Ga, As, and P occurs easily near the interface between the layers, and the band structure changes from InGaAs to In.
This situation is shown in Figure 3, where InP changes to P, Ga1-, AsyPI-X metamorphism is realized.
Since holes injected into the multiplication layer do not experience large band discontinuities, high-speed photoresponse characteristics are possible.

〔実施例〕〔Example〕

以下、本発明の実施例について図面を用いて詳細に説明
する。第1図(a>、(b)、(c)は本発明の一実施
例を説明するために、工程順に示した素子の断面図であ
る。
Embodiments of the present invention will be described in detail below with reference to the drawings. FIGS. 1(a), 1(b), and 1(c) are cross-sectional views of an element shown in the order of steps for explaining an embodiment of the present invention.

まず、第1図(a)に示すように、n型InP基板l上
にn型InPバッファ層2.n型InGaAS光吸収層
3.n屑InGaAsP層4.n型InP増倍層5.n
型InPキャップ層6を多成長室を有するハイドライド
気相成長方法によって得ている0次に、第1図(b)に
示すように、本発明の特徴である燐圧雰囲気のもとて8
00℃2時間の熱処理をほどこす。次に、第1図(c)
に示すように、拡散法によりP型受光部領域、P型ガー
ドリ〉・グ領域を形成し、その後に5i02膜、電極を
形成し、アバランシェ増倍型受光素子を得ている。
First, as shown in FIG. 1(a), an n-type InP buffer layer 2. n-type InGaAS light absorption layer 3. n-scrap InGaAsP layer 4. n-type InP multiplication layer5. n
The InP type cap layer 6 is obtained by a hydride vapor phase epitaxy method having multiple growth chambers.As shown in FIG.
Heat treatment at 00°C for 2 hours. Next, Figure 1(c)
As shown in FIG. 3, a P-type light-receiving region and a P-type guard region are formed by a diffusion method, and then a 5i02 film and an electrode are formed to obtain an avalanche multiplication light-receiving element.

第2図は、熱処理の有無によるアバランシェ増倍型受光
素子の光応答周波数特性図である。いずれも内部利得に
よる増倍率を10倍に固定した状態での測定である。こ
れより熱処理をほどこした場合には〜7GH2までの帯
域を有するが、熱処理がない場合には〜3GH2までし
かない。
FIG. 2 is an optical response frequency characteristic diagram of an avalanche multiplication type light receiving element with and without heat treatment. In both cases, the measurements were made with the multiplication factor due to the internal gain fixed at 10 times. From this, when heat treatment is applied, the band is up to ~7GH2, but when no heat treatment is applied, the band is only up to ~3GH2.

〔発明の効果〕〔Effect of the invention〕

以上説明したように、本発明の製造方法により作製した
アバランシェ増倍型受光素子は、光応答の周波数特性に
ついて従来に比較し改善されている事が判る。これは、
本発明である熱処理をほどこすことによって、界面近傍
で原子の相互拡散が生じ、バンド構造の急峻な不連続性
がなくなり、キャリアのトラップが起きにくくなった為
に、高速応答が可能になったことによる。
As explained above, it can be seen that the avalanche multiplication type light receiving element manufactured by the manufacturing method of the present invention has improved frequency characteristics of optical response compared to the conventional one. this is,
By applying the heat treatment of the present invention, interdiffusion of atoms occurs near the interface, sharp discontinuities in the band structure are eliminated, and carrier traps are less likely to occur, making high-speed response possible. It depends.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図(a)、<b)、(c)は本発明の一実指例を説
明するために工程順に示した素子の断面図、第2図は熱
処理の有無によるアバランシェ増倍型受光素子の光応答
周波特性図、第3図は、本発明の原理であるInGaA
sJilとInP層界面の熱処理によるバンド構造の変
化を示す図、第4図は従来のアバランシェ増倍型受光素
子の一例の構造を示す断面図である。 1・・・n型InP基板、2・・・n型InPバッファ
層、3・・・n型InGaAs光吸収層、4・・・n型
InGaAsP層、5−n型InP増倍層、6−・−n
型InPキャップ層、7・・・P型受光領域、8・・・
P型ガードリング領域、9・・・P側電極、10・・・
n111第1 図 変調珂浪数(Cr/k ) 第2 口
FIGS. 1(a), <b), and (c) are cross-sectional views of elements shown in order of process to explain one example of the present invention, and FIG. 2 is an avalanche multiplication type light-receiving element with and without heat treatment. Figure 3 shows the optical response frequency characteristic diagram of InGaA, which is the principle of the present invention.
FIG. 4 is a cross-sectional view showing the structure of an example of a conventional avalanche multiplication type light-receiving element. DESCRIPTION OF SYMBOLS 1...n-type InP substrate, 2...n-type InP buffer layer, 3...n-type InGaAs light absorption layer, 4...n-type InGaAsP layer, 5-n-type InP multiplication layer, 6-・-n
type InP cap layer, 7...P type light receiving region, 8...
P-type guard ring region, 9... P-side electrode, 10...
n111 1st figure modulation number (Cr/k) 2nd mouth

Claims (1)

【特許請求の範囲】[Claims] 半導体基板上に光吸収層である第一の半導体層を形成す
る工程と、アバランシェ増倍層である第二の半導体層を
形成する工程とを含んで層構造を形成する半導体受光素
子の製造方法において、前記層構造を形成した後650
℃以上の高温雰囲気で熱処理する工程を付加したことを
特徴とする半導体受光素子の製造方法。
A method for manufacturing a semiconductor light-receiving element that forms a layered structure including the steps of forming a first semiconductor layer as a light absorption layer on a semiconductor substrate and a second semiconductor layer as an avalanche multiplication layer. After forming the layered structure, 650
A method for manufacturing a semiconductor light receiving element, characterized by adding a step of heat treatment in a high temperature atmosphere of ℃ or higher.
JP61243641A 1986-10-13 1986-10-13 Manufacture of semiconductor photodetector Pending JPS6396968A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61243641A JPS6396968A (en) 1986-10-13 1986-10-13 Manufacture of semiconductor photodetector

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61243641A JPS6396968A (en) 1986-10-13 1986-10-13 Manufacture of semiconductor photodetector

Publications (1)

Publication Number Publication Date
JPS6396968A true JPS6396968A (en) 1988-04-27

Family

ID=17106841

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61243641A Pending JPS6396968A (en) 1986-10-13 1986-10-13 Manufacture of semiconductor photodetector

Country Status (1)

Country Link
JP (1) JPS6396968A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011060792A (en) * 2009-09-04 2011-03-24 Sumitomo Electric Ind Ltd Method for manufacturing semiconductor element

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011060792A (en) * 2009-09-04 2011-03-24 Sumitomo Electric Ind Ltd Method for manufacturing semiconductor element

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