JPS6390333U - - Google Patents
Info
- Publication number
- JPS6390333U JPS6390333U JP18519186U JP18519186U JPS6390333U JP S6390333 U JPS6390333 U JP S6390333U JP 18519186 U JP18519186 U JP 18519186U JP 18519186 U JP18519186 U JP 18519186U JP S6390333 U JPS6390333 U JP S6390333U
- Authority
- JP
- Japan
- Prior art keywords
- transistor
- potential
- resistors
- conversion circuit
- input terminal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000006243 chemical reaction Methods 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Logic Circuits (AREA)
Description
第１図は本考案の実施例を示す回路図、第２図
は従来の信号変換回路を示す回路図である。
１…第１の電位、２…第１のトランジスタ、３
…第２の電位、４…第２のトランジスタ、Ｒ１，
Ｒ２…抵抗、ＯＵＴ１，ＯＵＴ２…信号出力端、
ＩＮ…信号入力端。
FIG. 1 is a circuit diagram showing an embodiment of the present invention, and FIG. 2 is a circuit diagram showing a conventional signal conversion circuit. 1...First electric potential, 2...First transistor, 3
...Second potential, 4...Second transistor, R1 ,
R2 ...Resistor, OUT1 , OUT2 ...Signal output terminal,
IN...Signal input terminal.
Claims (1)
ジスタと、第２の電位にエミツタを接続した前記
第１のトランジスタとは逆極性の第２のトランジ
スタとを備え、前記第１及び第２のトランジスタ
のベース同士を２以上の抵抗を介して接続しこれ
ら抵抗の交点を信号入力端とし、第１及び第２の
トランジスタの各コレクタを信号出力端とし、前
記信号入力端はアース電位、電源電位、または無
接続のいずれかの状態に切り替え設定されること
を特徴とする信号変換回路。 a first transistor having an emitter connected to a first potential; and a second transistor having an opposite polarity to the first transistor having an emitter connected to a second potential; The bases of the transistors are connected to each other via two or more resistors, the intersection of these resistors is used as a signal input terminal, each collector of the first and second transistor is used as a signal output terminal, and the signal input terminal is connected to a ground potential, a power supply potential, A signal conversion circuit characterized in that the signal conversion circuit is switched to either a non-connected state or a non-connected state.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18519186U JPS6390333U (en) | 1986-12-01 | 1986-12-01 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18519186U JPS6390333U (en) | 1986-12-01 | 1986-12-01 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6390333U true JPS6390333U (en) | 1988-06-11 |
Family
ID=31133585
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP18519186U Pending JPS6390333U (en) | 1986-12-01 | 1986-12-01 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6390333U (en) |
-
1986
- 1986-12-01 JP JP18519186U patent/JPS6390333U/ja active Pending