JPS6388829A - Vapor growth method - Google Patents
Vapor growth methodInfo
- Publication number
- JPS6388829A JPS6388829A JP23350486A JP23350486A JPS6388829A JP S6388829 A JPS6388829 A JP S6388829A JP 23350486 A JP23350486 A JP 23350486A JP 23350486 A JP23350486 A JP 23350486A JP S6388829 A JPS6388829 A JP S6388829A
- Authority
- JP
- Japan
- Prior art keywords
- heat treatment
- film
- psg
- vapor phase
- approximately
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 title claims abstract description 17
- 238000010438 heat treatment Methods 0.000 claims abstract description 15
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 8
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 8
- 239000010703 silicon Substances 0.000 claims abstract description 8
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims abstract description 6
- 229910052698 phosphorus Inorganic materials 0.000 claims abstract description 6
- 239000011574 phosphorus Substances 0.000 claims abstract description 6
- 239000005368 silicate glass Substances 0.000 claims abstract description 4
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims abstract description 3
- 229910052796 boron Inorganic materials 0.000 claims abstract description 3
- 238000001947 vapour-phase growth Methods 0.000 claims description 17
- 239000012808 vapor phase Substances 0.000 claims description 5
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 abstract description 2
- 230000006837 decompression Effects 0.000 abstract 2
- 238000007669 thermal treatment Methods 0.000 abstract 1
- 239000010408 film Substances 0.000 description 26
- 239000005360 phosphosilicate glass Substances 0.000 description 10
- 239000005380 borophosphosilicate glass Substances 0.000 description 6
- 238000010586 diagram Methods 0.000 description 4
- 239000004065 semiconductor Substances 0.000 description 4
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- XYFCBTPGUUZFHI-UHFFFAOYSA-N Phosphine Chemical compound P XYFCBTPGUUZFHI-UHFFFAOYSA-N 0.000 description 2
- 229910052581 Si3N4 Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- 239000010409 thin film Substances 0.000 description 2
- 102100021983 Pregnancy-specific beta-1-glycoprotein 9 Human genes 0.000 description 1
- 238000001505 atmospheric-pressure chemical vapour deposition Methods 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 229910021419 crystalline silicon Inorganic materials 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000011261 inert gas Substances 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 229910000073 phosphorus hydride Inorganic materials 0.000 description 1
- 108010001918 pregnancy specific glycoprotein 18 Proteins 0.000 description 1
- 108010000627 pregnancy-specific beta-1-glycoprotein 7 Proteins 0.000 description 1
- 239000011800 void material Substances 0.000 description 1
Landscapes
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Formation Of Insulating Films (AREA)
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
本発明は、半導体装置の製造工程における半導体ウェハ
ー上に薄膜を成長させる気相成長方法に関するものであ
る。DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a vapor phase growth method for growing a thin film on a semiconductor wafer in the manufacturing process of semiconductor devices.
従来の技術
近年、デバイスの高集積化及び高速化の対応が最も大き
な関心事項として挙げられるが、特にＭＯＳ −Ｌ Ｓ
Ｉの製造工程において、気相成長装置は、選択的にフ
ィールド酸化膜を形成する際の２へ−７
マスクとなる８１３Ｎ４膜（シリコン窒化膜）、あるい
はゲート電極となるＰｏ １ ｙＳ ｉ膜（多結晶シリ
コン膜）等、更には多層配線間の層間絶縁膜となるＰＳ
Ｇ膜（リン硅酸ガラス膜）、Ｐ−８ｉＮ膜（プラズマシ
リコン窒化膜）等の薄膜を形成するために用いられ、ゲ
ート電極となるＰｏ ｌ ｙＳ ｉ膜を成長させた後、
熱酸化、 ８１３Ｎ４膜成長後、ＰＳＧ膜やＢＰＳＧ膜
（ボロンリン硅酸ガラス膜）を気相成長させ熱処理によ
り平坦化させる工程も多く用いられているが、気相成長
時のＰＳＧ膜やＢＰＳＧ膜のステップカバレッジ（段差
被覆特性）が平坦化の度合に影響を及ぼすことは明らか
である。Background of the Invention In recent years, the greatest concern has been the increasing integration and speed of devices, and in particular, MOS-LS
In the manufacturing process of I, the vapor phase growth equipment is used to selectively form an 813N4 film (silicon nitride film), which serves as a 2-7 mask, or a Po 1 ySi film (multilayer film), which serves as a gate electrode. (crystalline silicon film), etc., and PS that serves as an interlayer insulating film between multilayer interconnections.
After growing the PolySi film that will be used to form the gate electrode and will be used to form thin films such as G film (phosphosilicate glass film) and P-8iN film (plasma silicon nitride film),
After thermal oxidation and 813N4 film growth, a process in which a PSG film or BPSG film (borophosphosilicate glass film) is grown in vapor phase and flattened by heat treatment is also often used. It is clear that step coverage affects the degree of planarization.
以下図面を参照しながら、上述した従来の気相成長方法
及び平坦化熱処理の一例について説明する。An example of the conventional vapor phase growth method and planarization heat treatment described above will be described below with reference to the drawings.
第３図は従来の気相成長方法及び平坦化熱処理のフロー
チャートを示すものである。FIG. 3 shows a flowchart of a conventional vapor phase growth method and planarization heat treatment.
第３図において、表面段差を有した半導体基板上に常圧
もしくは減圧の気相成長装置により、３６０°Ｃ〜４５
０″Ｃの温度条件で５ｉｎ４（シフ ｙ ） 、 ＰＨ
３３ へ−／
（ホスフィン）、Ｂ２Ｈ６（ジボラン）、０２（酸素）
及びＮ２（窒素）等の不活性ガスを供給して、ＰＳＧ又
はＢＰＳＧが気相成長され、次に熱処理装置により、１
ｂ／ｃｒｔｉ以上の高圧雰囲気９００〜１１００°Ｃ
の温度条件で熱処理される。第４図は、第３図のフロー
チャートに基づき、処理された前記シリコンウェハー上
のステップカバレッジの概略図を示すものであり、アス
ペクト比や気相成長前の段差の形状により、第４図に示
す様な形状となる。第４図において、１は半導体基板、
２は表面段差、３は気相成長膜、４はボイド（空洞）で
ある。In Fig. 3, a semiconductor substrate having surface steps is grown at 360°C to 45°C using a vapor phase growth apparatus under normal pressure or reduced pressure.
5in4 (Schiff y) at 0″C temperature condition, PH
33 to-/ (phosphine), B2H6 (diborane), 02 (oxygen)
PSG or BPSG is grown in a vapor phase by supplying an inert gas such as and N2 (nitrogen), and then 1
High pressure atmosphere of b/crti or higher 900-1100°C
Heat treated under temperature conditions of FIG. 4 shows a schematic diagram of the step coverage on the silicon wafer processed based on the flowchart in FIG. 3. Depending on the aspect ratio and the shape of the step before vapor phase growth, It becomes a different shape. In FIG. 4, 1 is a semiconductor substrate;
2 is a surface step, 3 is a vapor-phase grown film, and 4 is a void.
発明が解決しようとする問題点
しかしながら上記のような方法で気相成長後、平坦化熱
処理されたＰＳＧやＢＰＳＧ膜は、気相成長時の下地ス
テップに対するオーパーツ・ングの形状のまま熱処理さ
れているので、膜中にボイド（空洞）を含み、後工程で
のアルミ電極配線が断線するという問題点を有していた
。Problems to be Solved by the Invention However, PSG and BPSG films that have been subjected to flattening heat treatment after vapor phase growth using the above method are heat treated while remaining in the shape of an overpart ring relative to the underlying step during vapor phase growth. Therefore, the film contained voids (cavities), which caused the problem that the aluminum electrode wiring could be disconnected in a subsequent process.
本発明は上記問題点に鑑み、表面段差を平坦化するため
に用いられるＰＳＧやＢＰＳＧ膜にボイドを発生させな
い気相成長を可能にするものである。In view of the above problems, the present invention enables vapor phase growth without generating voids in PSG or BPSG films used to flatten surface steps.
問題点を解決するための手段
上記問題点を解決するために本発明の気相成長方法は、
ＰＳＧやＢＰＳＣｉなどの珪酸ガラス膜によシ平坦化す
る工程において、気相成長と熱処理を２回以上繰り返し
て行なうものである。Means for Solving the Problems In order to solve the above problems, the vapor phase growth method of the present invention includes:
In the step of planarizing a silicate glass film such as PSG or BPSCi, vapor phase growth and heat treatment are repeated two or more times.
作 用
本発明は上記した方法によって、気相成長膜の成長時の
オーバー・・ングを徐々に少なくし、最終的に平坦化さ
れた膜中でのボイド発生を抑制することができる。Function: By using the method described above, the present invention can gradually reduce overhang during growth of a vapor-phase grown film and suppress the generation of voids in the finally flattened film.
実施例
以下本発明の実施例の気相成長方法について、図面を参
照しながら説明する。第１図は本発明の気相成長方法を
用いた場合のフローチャート図、第２図（ａ）〜（ｄ）
は第１図に示す各工程のステップカバレッジの形状の概
略図を示すものである。EXAMPLES Hereinafter, vapor phase growth methods according to examples of the present invention will be explained with reference to the drawings. Figure 1 is a flowchart when using the vapor phase growth method of the present invention, Figures 2 (a) to (d)
1 shows a schematic diagram of the shape of step coverage of each process shown in FIG. 1. FIG.
第１図および第２図において、表面段差５を有したシリ
コンウェハー６上にまず、減圧ＣＶＤにより、温度４０
０°Ｃ２圧力０．３ ｔｏｎ 、 Ｓ ｉＨ４゜５ ペ
ージ
ＰＨ３，０２供給して、約３０００への第１ＰＳＧ７が
成長し、次に熱処理装置によシ、約５ ｂ／ｃｒＡの高
圧雰囲気下でＮ２と０２を用いて９００°Ｃで、第１熱
処理を行ない、更に、上記減圧ＣＶＤによシ約６０００
人の第２ＰＳＧ８を成長し、最後に上記熱処理装置によ
り、第２熱処理を行なった。1 and 2, a silicon wafer 6 having a surface step 5 is first coated at a temperature of 40°C by low pressure CVD.
0°C2 pressure 0.3 ton, SiH4°5 page PH3,02 is supplied to grow the first PSG7 to about 3000, then transferred to a heat treatment equipment under a high pressure atmosphere of about 5 b/crA N2 The first heat treatment was carried out at 900°C using
A second human PSG 8 was grown, and finally a second heat treatment was performed using the heat treatment apparatus described above.
以上のように本実施例によれば、ＰＳＧの気相成長と熱
処理を２回繰り返して行なうことによシ、平坦化が徐々
に進行するため、最終的に平坦化された膜中のボイド発
生を抑制することができる。As described above, according to this example, by repeating the vapor phase growth and heat treatment of PSG twice, planarization progresses gradually, so that voids are generated in the final planarized film. can be suppressed.
なお本実施例においては、ＰＳＧ膜を成長させる減圧Ｃ
ＶＤの場合について述べたが、ＢＰＳＧ膜を成長させる
常圧ＣＶＤの場合にも同様に適用できる。In this example, the reduced pressure C to grow the PSG film is
Although the case of VD has been described, it can be similarly applied to the case of atmospheric pressure CVD for growing a BPSG film.
発明の効果
以上のように本発明は、表面段差を有するシリコンウェ
ハー上をリン又はリン及びボロンを含ん６ ｔ、−ノ
テップに対するオーパーツ・ングを徐々に少なくしなが
ら、最終的には平坦化された膜中でのボイド発生を抑制
することにより、後工程でのアルミ電極配線の断線を防
止することができる。Effects of the Invention As described above, the present invention is capable of flattening a silicon wafer having a surface step while gradually reducing the overturning of phosphorus or phosphorus and boron containing 6t,-noteps. By suppressing the generation of voids in the film, it is possible to prevent disconnection of the aluminum electrode wiring in the subsequent process.
第１図は本発明の実施例における気相成長方法を用いた
フローチャート図、第２図（ａ）〜（ｄ）は第１図に示
す各工程のステップカバレッジ形状の概略ツブカバレッ
ジの形状を示す概略図である。
５・・・・・・表面断差、６・・・・・・シリコンウエ
ノ凡−１７・・・・・・第１ＰＳＧ１８・・・・・・第
２ＰＳＧ。Fig. 1 is a flowchart diagram using the vapor phase growth method in an embodiment of the present invention, and Figs. 2 (a) to (d) show the rough shape of the step coverage of each step shown in Fig. 1. It is a schematic diagram. 5...Surface difference, 6...Silicon Ueno-17...1st PSG18...2nd PSG.
Claims (1)
びボロンを含んだ珪酸ガラス膜を気相成長させる工程に
おいて、気相成長させた後に熱処理を行う一連の工程を
２回以上繰り返して行なうことにより、前記シリコンウ
ェハーの表面段差を平坦化することを特徴とする気相成
長方法。In the process of vapor phase growing a silicate glass film containing phosphorus or phosphorus and boron on a silicon wafer having surface steps, by repeating a series of steps of heat treatment after vapor phase growth twice or more, A vapor phase growth method characterized by flattening the surface steps of the silicon wafer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP23350486A JPS6388829A (en) | 1986-10-01 | 1986-10-01 | Vapor growth method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP23350486A JPS6388829A (en) | 1986-10-01 | 1986-10-01 | Vapor growth method |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6388829A true JPS6388829A (en) | 1988-04-19 |
Family
ID=16956063
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP23350486A Pending JPS6388829A (en) | 1986-10-01 | 1986-10-01 | Vapor growth method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6388829A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02151032A (en) * | 1988-12-02 | 1990-06-11 | Nec Corp | Semiconductor device |
| WO1991011023A1 (en) * | 1990-01-18 | 1991-07-25 | Kabushiki Kaisha Toshiba | Method of producing semiconductor devices |
| JPH04269420A (en) * | 1991-02-25 | 1992-09-25 | Oki Electric Ind Co Ltd | Manufacturing method of display panel |
| WO1997024755A1 (en) * | 1995-12-29 | 1997-07-10 | Lam Research Corporation | Semiconductor structure using modulation doped silicate glasses |
-
1986
- 1986-10-01 JP JP23350486A patent/JPS6388829A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02151032A (en) * | 1988-12-02 | 1990-06-11 | Nec Corp | Semiconductor device |
| WO1991011023A1 (en) * | 1990-01-18 | 1991-07-25 | Kabushiki Kaisha Toshiba | Method of producing semiconductor devices |
| JPH04269420A (en) * | 1991-02-25 | 1992-09-25 | Oki Electric Ind Co Ltd | Manufacturing method of display panel |
| WO1997024755A1 (en) * | 1995-12-29 | 1997-07-10 | Lam Research Corporation | Semiconductor structure using modulation doped silicate glasses |
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