JPH02151032A - Semiconductor device - Google Patents

Abstract

PURPOSE:To prevent the fluctuation in the capacity between wirings before and after the assembling process by a method wherein the gaps between the wirings of a semiconductor device are provided with cavities and then an almost flat surfaced passivation film is formed on the cavities. CONSTITUTION:An interlayer insulating film 2, metallic wirings 3 and a passivation film 4 are formed on a semiconductor substrate 1 to be covered with a case resin 5. The gap regions between the metallic wirings 3 in the passivation film 4 are provided with cavities 6 whose upper parts being sealed with the passivation film 4, the assembling case resin 5 can be prevented from permeating into the cavities. In such a constitution, the cavities are formed between the continuous wirings in sufficient length substantially preventing the case resin 5 from permeating into the cavities so that the fluctuation in the capacity between wirings may be negligibly miniaturized before and after the assembling process.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a semiconductor device, and particularly to a semiconductor device having a passivation film in which a cavity is formed in a gap between interconnections.

[Prior Art] Semiconductor devices generally include a film called a passivation film on the top metal wiring layer such as A1 wiring to protect the surface and prevent contaminants from entering internal elements. It is provided. This conventional example will be explained with reference to FIG. 4, which is a sectional view thereof.

As shown in the figure, on the semiconductor substrate 1 there is a glabellar insulator IN5.
! 2 is formed, and a metal wiring 3 is formed thereon. Then, the above-mentioned passivation film 4 is applied to the metal wiring 3.
and interlayer insulating film 2 . Its outer surface is further covered with case resin 5. Conventionally, as passivation films, phosphorus (P)-doped 5i02 films are made by chemical vapor deposition, SL, N,
Membranes and the like have often been used.

[Problems to be Solved by the Invention] The degree of integration of recent semiconductor devices has further increased, and the dimensions of elements have become smaller and smaller. Along with this, the problem of increased capacitance between metal interconnections has become a growing problem. this is,
Particularly noticeable in large memories, e.g. large RO
In M or RAM, the read speed decreases due to the capacitance added between the digit lines, and the dependence of the read speed on the read pattern increases.

However, conventional passivation films are made of metal.

The gap between the wirings is in an upwardly open state as shown in FIG. Therefore, when this semiconductor device is sealed in a case resin, the case resin enters into the gaps between the wirings. The relative dielectric constant of the material used for this assembly case resin is usually as high as about 4.3, while
In the wafer state, this portion is filled with air having a dielectric constant of 1. In this manner, this region is filled with a material having a higher dielectric constant in the assembled state compared to the wafer state, so that the inter-wiring capacitance increases after the assembly. As a result, the following problems arise. First, wafer-level testing becomes inaccurate, making it difficult to predict post-assembly product characteristics at the wafer stage. Second,
In a memory, the cycle time becomes longer due to an increase in the capacitance between bit lines after assembly, and the pattern dependence of the cycle time increases.

Thirdly, the prior art has the disadvantage that when the thickness of the passivation film is changed, the inter-wiring capacitance changes, so that the variation in the inter-wiring capacitance among products increases. This occurs because the thicker the passivation film is, the more the inter-wiring gaps are filled with the passivation film. In other words, the dielectric constant of the passivation film is as high as 38 for an oxide film and 6.5 for a nitride film, and as the spaces between metal wirings are filled with these materials, the capacitance between the metal wirings increases.

Therefore, the objects of the present invention are, firstly, to eliminate the difference in the capacitance between wirings between the wafer state and after the semiconductor device is assembled, and secondly, to reduce the capacitance between the wirings. The third objective is to prevent differences in inter-wiring capacitance due to the thickness of the passivation film.

[Means for Solving the Problems] In the semiconductor device according to the present invention, the passivation film covering the uppermost metal wiring has a cavity between the metal wiring. This cavity can be formed by appropriately setting the film formation conditions when forming the passivation film.

[Example] Next, an example of the present invention will be described with reference to the drawings.

FIG. 1 is a sectional view showing one embodiment of the present invention. A glabellar insulation 1112, metal wiring 3, and a passivation film 4 are formed on the semiconductor substrate 1, and these are covered with a case resin 5. A feature of this embodiment is that the passivation film 4 has a cavity 6 in the gap region between the metal wirings. Since this cavity is closed at the top by the passivation film 4, intrusion of the assembly case resin into this cavity is prevented.

This structure can be achieved, for example, by atmospheric pressure chemical vapor deposition using controlled growth conditions. This will be explained with reference to FIG. Figure 2 shows 4.
mo 1% P-doped silicon glass, film thickness 1.0 μm
The rIlj relationship between the angle θ between the vertically grown film and the horizontally grown film at the bottom of the grown film and the growth temperature when grown on the AI wiring of is plotted with the doping material POC1 and PH as parameters. It is. This allows the growth temperature to be lowered and the doping material to be adjusted to PH
3, the angle θ becomes smaller, that is,
It can be seen that the passivation film thickness on the side portions of the metal wiring is thicker at the top than at the bottom.

If PSG is grown thickly under such growth conditions in a region where the gap between metal interconnects is narrow, the growth of the upper portion of the interconnect will be faster than the growth of the lower portion of the interconnect, and eventually the films on the sides of the upper metal interconnect will come into contact with each other. Thereafter, the film grows only on the upper part of the metal wiring, and a cavity is formed in the gap region between the metal wiring.

Actually, the spacing is 1.0 μm, the width is 2.0 μm, and the length is 10 mm.
, P is used as a doping material for AI wiring with a thickness of 1.0 μm.
When 4mo 1% P-doped silicon glass was grown to a thickness of 1.5 μm at 400° C. using H, a cavity could be created over the entire wiring length. In this case, it was possible to grow a 0.5 μm thick P-doped silicon glass on the cavity. When a semiconductor device having this structure was assembled, resin was prevented from entering the cavity from above, and no cracks occurred in the passivation film. An open end of a cavity was formed at the end of the wiring, but the infiltration of the resin from this part was 10 μm. Therefore, as in this example, a cavity is formed between sufficiently long continuous wires,
There was virtually no resin infiltration into this part, and the fluctuation in inter-wiring capacitance before and after assembly was negligibly small. Actually, this passivation film is used as a mask RO.
When applied to M, it was possible to eliminate fluctuations in read speed between the wafer state and after assembly.

In addition, in this structure, the passivation film deposited with a thickness of 1.5 μm in the example was replaced with, for example, 2.0 μm.
Even if the film is deposited even thicker than m, this increase in film thickness will not affect the inter-wiring capacitance.

Furthermore, since a certain amount of cavity exists between the wirings, the capacitance between the wirings can be made smaller in terms of the ratio t14 electric rate than when all the spaces between the wirings are filled with a passivation film or case resin.

FIG. 2 is a sectional view showing another embodiment of the invention. The difference between this embodiment and the previous embodiment is that the passivation film is composed of two layers, a first passivation film 4a and a second passivation film 4b.

After forming the same AI wiring as in the previous example, 4mo 1% PSG was applied as the first passivation film 4a.
2μm, then second passivation WA
As 4b, a plasma nitride film was grown to a thickness of 0.8 μm. Since the growth conditions for 4mo I%PSG were the same as in the previous example, cavities could still be produced. After that, a plasma nitride film was grown, so that a 02 μm thick PSG layer and a 0.8 μm thick plasma nitride film were stacked on top of the cavity.

According to this embodiment, the reliability of the semiconductor device can be improved by using a combination of passivation film materials such as a nitride film that has excellent moisture resistance and resistance to ion permeation. Furthermore, even if a material with a high dielectric constant such as a nitride film is used, it will not be inserted between the wirings, so the capacitance between the wirings will not increase.

[Effects of the Invention] As explained above, the present invention has a cavity in the gap between the wirings of a semiconductor device, and has a passivation film whose upper surface is made substantially flat. The following effects can be achieved.

■ Since case resin does not flow between the wires during the assembly process, the capacitance between the wires does not change before and after assembly, allowing highly accurate testing at the wafer stage.

■ Inter-wiring capacitance does not change due to differences in passivation film thickness, and variations in product characteristics can be suppressed.

■ Since the gaps between the wires are not filled with a material with a high dielectric constant, the capacitance between the wires can be reduced.

[Brief explanation of the drawing]

FIG. 1 is a sectional view showing one embodiment of the present invention, and FIG. 2 is a sectional view showing an embodiment of the present invention.
FIG. 3 is a cross-sectional view showing another embodiment of the present invention, and FIG. 4 is a cross-sectional view showing a conventional example. 1... Semiconductor substrate, 2... Interlayer insulating film, 3...
・Metal wiring, 4... Passivation film, 4a・
...First passivation film, 4b...Second passivation film, 5...Case resin, 6...
cavity.

Claims (1)

[Claims] A semiconductor substrate, an insulating film formed on the semiconductor substrate, a plurality of wiring layers formed on the insulating film, and a passivation film formed covering the plurality of wiring layers and the insulating film. A semiconductor device characterized in that a cavity is formed in the passivation film between the wiring layers, and the upper surface of the passivation film is made substantially flat.