JPS6385445A - Ultrasonic measuring instrument - Google Patents

Abstract

PURPOSE:To eliminate a capacitor for peak holding by increasing or decreasing a reference level side and comparing it with an echo signal by a comparator, etc., following up the reference level side by the echo signal, and finding the peak value of the reference level. CONSTITUTION:The received signal of an echo from a probe 1 is inputted to the comparator 6 through a pulser-receiver 2 and compared with the reference level from a microcomputer 10. Then when the reference level is smaller (larger), the reference level is increased (decreased) according to a prescribed function and then compared with a received signal in the next cycle. This comparison and increase or decrease in the reference level are carried on for (n) cycles and the reference level in the final cycle is regarded as the peak value.

Description

[Detailed Description of the Invention] [Industrial Field of Application] This invention relates to an ultrasonic measuring device, and more specifically,
The present invention relates to an ultrasonic measurement device that can detect a peak without using a peak holding capacitor or the like in a peak level detection circuit of a measuring instrument, flaw detector, etc. that uses ultrasonic waves.

[Prior art] Ultrasonic measuring devices use ultrasonic signals to measure thickness, inspect defects, and detect flaws. It will look like Figure 4.

As shown in Figure 4, when a transmission pulse signal T is applied to the probe, multiple ultrasonic echoes are returned from the object to be inspected, and these are surface echo signals S (S waves).
, defect echo signal F (F wave), and bottom echo signal B
(B wave) is received by the probe.

However, the state of the echo signal at this time differs in its waveform and the number of pulse signals depending on the object to be inspected. Note that the signal G shown in FIG. 4 indicates a gate signal for extracting the echo signal.

In plate thickness gauges, defect inspection equipment, flaw detection equipment, etc., the time t from the transmitted pulse T (or surface echo S) to each echo signal is measured to measure the thickness of the workpiece, the position of flaws, etc. However, in this case, in addition to the significant echo signals, noise signals and other surrounding signals are mixed into the echo signals S, F, and H. However, the really necessary signal here is generally the echo signal F among the received echo signals,
This corresponds to the pulse signal when its peak value is maximum.

To detect the peak level of this echo signal, a gate (gate signal G) is applied to extract only the necessary portion of the echo signal and hold its peak. Analog switch circuits are often used as circuits that perform gate processing for this purpose, and an example of the circuit configuration is shown in FIG. In FIG. 5, a received signal (echo signal) from a probe 1 is input to a pulser m-receiver 2, and its output is sent to a peak hold circuit 5 via an analog switch circuit 3 that performs gate operation. be done. Here, analog switch circuit 3
The gate operation is performed according to the gate signal of the gate signal generation circuit 4, and the target echo signal is extracted at the timing and width set corresponding to the gate signal G.

By the way, in ultrasonic measurement, detecting and measuring the peak level of the echo signal is an important matter when quantitatively evaluating the amount of defects in a test piece or determining the nugget strength of spot welding. ing.

[Problem to be Solved] Since the analog switch circuit 3 passes high frequency signals, it must operate at even higher speeds. Therefore, this circuit has the drawback of being complex and expensive.

On the other hand, various types of peak hold detection circuits are possible, but an OP amplifier is often used for peak hold for high frequency signals with extremely narrow pulse widths, such as echo signals for ultrasound waves. This may require an OP amplifier with a high slew rate. Furthermore, the voltage holding capacitor for the peak value must also have low leakage. Therefore, if a peak hold circuit is constructed using components that meet the required characteristics, the cost will inevitably be high.

[Purpose of the Invention] This invention solves the problems of the prior art, and provides an ultrasonic measuring device that can detect peak levels without using a peak holding capacitor or the like. The purpose is to

[Means for Solving the Problems] Specifically, the feature of the present invention is to use a microprocessor and a comparator IC to detect a peak by utilizing the repeated appearance of an ultrasonic waveform. The means in the ultrasonic measurement device of the present invention to achieve the above object compares the received echo signal or the pulse signal corresponding thereto with a preset reference level, and when this reference level is smaller, the The reference level is increased according to a predetermined function, and the received signal of the next cycle or the pulse signal corresponding thereto is compared with the increased reference level, and when the reference level is larger, the reference level is decreased according to the predetermined function. compare the received signal of the next cycle or the pulse signal corresponding thereto with the reduced reference level, and increase or decrease the reference level over n cycles (n is an integer of 2 or more), The reference level in the last cycle is taken as the peak value.

[Function] By increasing or decreasing the reference level side in this way, comparing it with the echo signal using a comparator, etc., making the echo signal follow the reference level side, and finding the peak value from the reference level, the echo signal can be calculated. There is no need to hold voltage etc. in a capacitor or the like.

As a result, as a peak detection circuit, O
There is no need to use a P amplifier, and gate processing can also be done by extracting the output of a comparator or the like using an AND condition.

Therefore, the entire peak detection circuit can be constructed at low cost.

[Embodiments] Hereinafter, embodiments of the present invention will be described with reference to the drawings.

Fig. 1 is a block diagram of an embodiment of a peak level detection circuit in an ultrasonic measuring device to which the present invention is applied, Fig. 2 is an explanatory diagram of the output waveform of each part thereof, and Fig. 3 is an explanatory diagram of its operation. It is.

In FIG. 1, 20 is a peak level detection circuit which applies a gate to the output signal of the pulser/receiver 2 shown in FIG. 2(a) and detects the maximum voltage between the gates. In other words, this means that (a) in Figure 2
This corresponds to detecting the Vp point at . The comparator 6 of the peak level detection circuit 20 receives an output signal having the waveform shown in FIG. 2(a) from the pulser-receiver 2, and
This is compared with the output signal of the D/A converter 8, and the result is input to the NAND circuit 7.

Here, the human power of the D/A converter 8 is controlled by the microcomputer 10, and the output signal of the D/A converter 8 is the level v shown in (a) of FIG.
The voltage value of Q is input.

Comparator 6 is connected to the voltage value of level VQ and
Upon receiving these two inputs of the output signals of the receiver 2, the output waveform becomes the waveform shown in FIG. 2(b). NAN
The D circuit 7 receives this signal and also receives the signal (C
), the gate signal G from the gate circuit 4 is received manually, and an output signal 11 as shown in FIG. 2(d) is obtained as the output of the NAND circuit 7.

That is, the output signal of the comparator 6 (see FIG. 2(b)) is taken out as an output only within a certain range of the gate. Regarding the way in which the gate signal G is added by the gate circuit 4, the gate signal G is synchronized with the output signal of the pulser/receiver 2, and this synchronized gate signal G is generated by the gate circuit 4. Therefore, the gate signal G is applied to the NAND circuit 7 at a necessary time interval. In addition,
This gate circuit 4 can be configured using, for example, a monostable multi-circuit.

The output signal 11 is then sent to the microcomputer 10.
However, since the output pulse width is narrow, it may not be suitable as a signal to be directly input to the microcomputer 10. Therefore, a flip-flop circuit 9 is placed in the middle, and the signal is input to the microcomputer 10 through this. The flip-flop circuit 9 is here R-
Using an S flip-flop, the output signal 11 of the NANI) circuit 7 is input as a set signal to the flip-flop 9. And the a output signal 13 of the flip-flop 9
is input to the microcomputer 10 as a determination result signal.

When the microcomputer 10 receives this a output signal 13, the microcomputer 1o sends a reset signal 12 to the flip-flop 9 to reset the flip-flop 9. In this way, until the reset signal 12 is applied by the microcomputer 10, the σ output signal 13 of the flip-flop 9 remains fixed as, for example, a Low level (hereinafter referred to as 11L'') signal.

This signal is transmitted to the microcomputer 1 in terms of timing.
0 is a signal that can be read in 1-minutes. In addition, the second
When the output signal with the waveform shown in (a) of the figure is larger than the output signal (reference level) of the 1)/A converter 8, the σ output signal 13 as a comparison judgment result becomes "L", otherwise it is at the HIGH level. (hereinafter referred to as "H").

The reset signal 12 is the output of the microcomputer 10.
is added to the flip-flop 9 whose a output signal 1
3 is reset to “H”.

Therefore, unless the output signal 11 (set signal) of the NAND circuit 7 is input as "L", the a output signal 13 of the flip-flop 9 remains "H". As a result, only the signal extracted by the gate signal and higher than the set level is detected.

In this way, the gate signal G (see FIG. 2(C)) is added to the output signal of the pulser/receiver 2 (see FIG. 2(a)), and a certain threshold level voltage (D/A
A signal exceeding the output VQ of the converter 8 can be sampled, and the microcomputer 10 can accept this as a signal with a pulse width that can be detected within 1 minute compared to the very narrow output signal of the pulser/receiver 2.

Here, the microcomputer 10 has a microprocessor 10a and a memory 10b.
0b stores a threshold calculation program 20a, a peak detection flag setting program 20b, and the like.

Next, the peak detection operation of the microcomputer 10 will be explained.

In FIG. 3, the received echo signal of the ultrasonic echo is repeatedly output as an analog signal from the pulser/receiver 2 periodically at a cycle of time ts. At this time, the maximum expected output value of the output signal of the pulser/receiver 2 is temporarily set as Va, and this value is stored in advance in the memory 10b.

Here, what is detected is point Vp of the echo signal F in FIG. 2(a). Therefore, the microprogram 10a is
Start the threshold calculation program 20a,
The reference level is calculated using the following two formulas.

First, the determination result of the comparator 6 is "1", that is,
When the a output signal 13 is "L", in other words, the reference level may be smaller than the peak value. In this case, as a function to increase from the current value, if the previous reference level is larger than the current reference level setting value, the following equation is used to calculate the next reference level.

VTHI+7 = 1/2 (VTHI-7+VT
HI ) -(D On the other hand, when the previous reference level is smaller than the current reference level setting value, the following equation is used to calculate the next reference level by referring to the previous larger reference level.

VTHI+7: 1/2 (VTHI-2+V
THI ) -■ Similarly, when the determination result of the comparator 6 is "0", the a output signal 13 is "H", in other words, the reference level may be greater than the peak value. In this case, as a function to decrease from the current value, when the previous reference level is smaller than the current reference level setting value, calculation is performed using equation (2) to obtain the next reference level.

- On the other hand, if the previous level is higher than the current reference level setting value, refer to the previous smaller reference level and set it to 0.
Perform calculations using the formula to find the next reference level.

Therefore, first, let's set the currently set level as i=0 and set V
Let T■θ=Va. Then, as VT old-7=0,
Considering the first setting of i=VTHθ=Va, V THI is calculated according to the following equation from the above equation (2) to calculate the threshold voltage.

VTHI+7 = 1/2 (VTHI-7+Va
) ”...■ However, i = 1 to n1. Note that 2〇 is used at the start point.

As a result, the first output level of the D/A converter 8 by the microcomputer 10 is set to 1/2.Va level, which is 1/2.va=VTH1. If the output signal of the pulser-receiver 2 (analog signal in FIG. ”). When receiving this signal, the microprogram 10a can obtain the information "l" indicating that the signal has been exceeded, and the microprogram 10a that receives this signal can:
The peak detection flag setting program 20b is started to set a flag of 1" in a predetermined area of the memory to clear this event, and to store the flag 1" in a predetermined area of the memory.
During or before the output of the receiver 2, a reset signal 12 is generated for the flip-flop 9.

Then, the threshold calculation program 20a is started, and the conveyor level of the converter 6 is 1/2 (VA+VTIT/) = VTH2 from the formula (■).
This value is output from the D/A converter 8 and sent to the comparator 6 at a predetermined timing.

As a result, this level VT112 and the signal between the gates 6 of the output signal (analog signal) of the pulser/receiver 2 are compared, and then, since the level does not exceed VT)+2, the information "0" is output to the microcomputer 10. is input.

When the a output signal 13 from the flip-flop 9 becomes "H", the threshold calculation program 20a performs calculation processing based on the following equation to calculate a threshold voltage.

VTHI+7 = 1/2 (VTBI-7+VTH
i) Therefore, for the third time, first clear the flip-flop 9, and 1/2 (VTH/ +VTH2) =
The value of VTH3 is outputted by the D/A converter 8 and used as the conveyor level of the analog signal.

By repeating this operation, for example, eight times and finding the final threshold value, the peak value is found as a digital value with 8-bit resolution of the maximum value va of the analog signal, and the echo signal ( This can be done by searching for the maximum value Vp between the gates of the analog signal).

Ultrasonic signals emit the same ultrasonic signal repeatedly, and during a certain measurement, it is necessary to output the waveform stably (8 same side - 1 -), but is it necessary to check whether the value is stable? Alternatively, the software of the microcomputer 10 can handle the burden. For example, when the 8-bit output has the same value twice, it is considered stable and that value is correct.

On the other hand, with this peak detection circuit, if the period is set to 8 and the search is performed 8 times (8 cycles), the resolution will be 8 bits, but if this is searched 10 times (10 cycles), the resolution will be 10 bits, depending on the accuracy. The number of cycles can be set arbitrarily.

By the way, in the conventional peak detection circuit method using an analog circuit, high-speed and high-band signal switching characteristics are required using the analog switch circuit, and furthermore, when the peak hold circuit becomes 10 MHz or higher, the circuit If the components used in the system were OP amplifiers, the slew rate would be high and expensive components would have to be used.

However, if the base coating level side is made to follow the echo signal and the reference level is developed to match the peak value as in the above embodiment, it is not necessary to use an OP amplifier with a high slew rate. Note that some comparators have very fast response times, as fast as 1onsec.
This IC is also available at a relatively low cost and can stably detect peaks up to considerably high frequencies.

In addition, if a microcomputer is used as in the embodiment, there is no need to digitize the peak level, and no A/D converter is required, and the output of the subsequent stage (or subsequent processing) is directly obtained in the form of a digital value of the peak level. be able to.

As described above, the function for increasing or decreasing the reference level in the embodiment is an example, and may be any function that increases or decreases according to a predetermined formula.

[Effects of the Invention] Therefore, in this invention, the received echo signal or the pulse signal corresponding thereto is compared with a preset reference level, and when this reference level is smaller, This reference level is increased according to a predetermined function, and the received signal of the next cycle or the corresponding pulse signal is compared with the increased reference level, and when the reference level is larger, the reference level is decreased according to a predetermined function. and compares the received signal of the next cycle or the pulse signal corresponding thereto with the reduced reference level, and increases or decreases the reference level over n cycles (n is an integer of 2 or more - 1 -). Since the reference level in the last cycle is set as the peak value, the echo signal can be followed by the reference level side and the peak value can be determined from the reference level. There is no need to hold voltage etc. in a capacitor or the like.

As a result, as a peak detection circuit, O
There is no need to use a P amplifier, and gate processing can be easily performed by extracting the output of a comparator or the like using an AND condition.

Therefore, the entire peak detection circuit can be constructed at low cost.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of an embodiment of a peak level detection circuit in an ultra-A wave measuring device to which the present invention is applied, FIG. 2 is an explanatory diagram of the output waveforms of each part, and FIG. 3 is an explanation of its operation. 4 are explanatory diagrams of general transmission and reception waveforms when measuring using ultrasonic signals, and FIG. 5 is a block diagram of a conventional peak hold circuit. ■...Probe, 2...Pulsar pot receiver, 3...
・Analog switch circuit, 4... Gate circuit, 5...
・Peak hold circuit, 6... Comparator, 7...
・NAND circuit, 8...D/A converter, 9...
Flip O-flop, 10... Microcomputer, II... Set signal, 12... Reset signal, 1
3...Flip-flop d output signal.

Claims (3)

[Claims] (1) In an ultrasonic measuring device that generates an ultrasonic transmission pulse at a fixed period, receives an echo from an object to be measured, and performs a predetermined measurement, a received signal of the echo or a pulse signal corresponding thereto is compared with a preset reference level, and when this reference level is smaller, this reference level is increased according to a predetermined function, and the received signal or the corresponding pulse signal of the next cycle and the increased reference level are compared. If the reference level is higher, the reference level is decreased according to a predetermined function, and the received signal of the next cycle or the pulse signal corresponding thereto is compared with the decreased reference level. , n periods (n
is an integer of 2 or more), and the reference level in the last cycle is set as a peak value. (2) Comparison of the received echo signal or the corresponding pulse signal with the reference level is performed by an analog comparator, and the judgment result of the analog comparator is obtained based on the AND condition of the output of this analog comparator and the gate signal. and the processor performs an operation to increase or decrease the reference level according to the determination result, and transmits the result to the analog comparator via the D/A converter. The ultrasonic measuring device according to item 1. (3) The ultrasonic measuring device according to claim 2, wherein the signal based on the AND condition is sent to the processor via a flip-flop.