JPS6383824U - - Google Patents

Info

Publication number
JPS6383824U
JPS6383824U JP17789486U JP17789486U JPS6383824U JP S6383824 U JPS6383824 U JP S6383824U JP 17789486 U JP17789486 U JP 17789486U JP 17789486 U JP17789486 U JP 17789486U JP S6383824 U JPS6383824 U JP S6383824U
Authority
JP
Japan
Prior art keywords
circuit
output end
emitter follower
demodulation circuit
demodulates
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP17789486U
Other languages
Japanese (ja)
Other versions
JPH0332110Y2 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP17789486U priority Critical patent/JPH0332110Y2/ja
Publication of JPS6383824U publication Critical patent/JPS6383824U/ja
Application granted granted Critical
Publication of JPH0332110Y2 publication Critical patent/JPH0332110Y2/ja
Expired legal-status Critical Current

Links

Landscapes

  • Channel Selection Circuits, Automatic Tuning Circuits (AREA)
  • Superheterodyne Receivers (AREA)
  • Circuits Of Receivers In General (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の一実施例の回路図、第2図は
本考案の他の実施例の回路図、第3図、第4図、
第5図はそれぞれ従来例の回路図である。 1……AM復調回路、4,8,8′……第1の
エミツタホロワ回路、9……電源、10……FM
復調回路、15……FMステレオ復調回路、22
,22′……電力増幅器、23,23′……スピ
ーカー。
Figure 1 is a circuit diagram of one embodiment of the present invention, Figure 2 is a circuit diagram of another embodiment of the present invention, Figures 3 and 4,
FIG. 5 is a circuit diagram of a conventional example. 1...AM demodulation circuit, 4,8,8'...first emitter follower circuit, 9...power supply, 10...FM
Demodulation circuit, 15...FM stereo demodulation circuit, 22
, 22'... power amplifier, 23, 23'... speaker.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] AM信号を復調するAM復調回路と、このAM
復調回路の出力端の直流動作点をシフトする第1
のエミツタホロア回路と、この第1のエミツタホ
ロア回路の出力端に入力端を接続した第2のエミ
ツタホロア回路と、FM信号を復調し、出力端を
前記第2のエミツタホロア回路の出力端に接続し
たFM復調回路と、前記AM復調回路とFM復調
回路の一方に選択的に電源を供給する手段とを具
備することを特徴とするAM・FM受信機。
An AM demodulation circuit that demodulates an AM signal, and this AM
The first step shifts the DC operating point of the output end of the demodulation circuit.
a second emitter follower circuit whose input end is connected to the output end of the first emitter follower circuit; and an FM demodulator which demodulates an FM signal and whose output end is connected to the output end of the second emitter follower circuit. An AM/FM receiver comprising: a circuit; and means for selectively supplying power to one of the AM demodulation circuit and the FM demodulation circuit.
JP17789486U 1986-11-18 1986-11-18 Expired JPH0332110Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17789486U JPH0332110Y2 (en) 1986-11-18 1986-11-18

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17789486U JPH0332110Y2 (en) 1986-11-18 1986-11-18

Publications (2)

Publication Number Publication Date
JPS6383824U true JPS6383824U (en) 1988-06-01
JPH0332110Y2 JPH0332110Y2 (en) 1991-07-08

Family

ID=31119521

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17789486U Expired JPH0332110Y2 (en) 1986-11-18 1986-11-18

Country Status (1)

Country Link
JP (1) JPH0332110Y2 (en)

Also Published As

Publication number Publication date
JPH0332110Y2 (en) 1991-07-08

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