JPS6379653U - - Google Patents

Info

Publication number
JPS6379653U
JPS6379653U JP17433486U JP17433486U JPS6379653U JP S6379653 U JPS6379653 U JP S6379653U JP 17433486 U JP17433486 U JP 17433486U JP 17433486 U JP17433486 U JP 17433486U JP S6379653 U JPS6379653 U JP S6379653U
Authority
JP
Japan
Prior art keywords
package
semiconductor device
chip
arranged around
external
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17433486U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP17433486U priority Critical patent/JPS6379653U/ja
Publication of JPS6379653U publication Critical patent/JPS6379653U/ja
Pending legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの考案による半導体装置の一実施例
を示す要部斜視図、第2図は、この考案の他の実
施例を示す要部斜視図、第3図は従来の半導体装
置を示す要部斜視図である。 1……ICチツプ、2……引き出し線、3……
外部ピン、4′,4″……ICパツケージ、a…
…引き出し線と外部ピンとの接続部、b……外部
ピンとプリント基板の配線との接続部。
FIG. 1 is a perspective view of main parts showing one embodiment of a semiconductor device according to this invention, FIG. 2 is a perspective view of main parts showing another embodiment of this invention, and FIG. 3 is a main part showing a conventional semiconductor device. FIG. 1...IC chip, 2...Leader line, 3...
External pin, 4', 4''...IC package, a...
... Connection part between the lead wire and external pin, b... Connection part between external pin and wiring on the printed circuit board.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] ICチツプを搭載したICパツケージと、前記
パツケージの周辺に配置された外部リードと、前
記ICチツプと前記外部リードとを接続する引き
出し線とを備えた半導体装置において、前記IC
パツケージを多角形状に形成するとともに該IC
パツケージの周辺部に外部リードを配置したこと
を特徴とする半導体装置。
A semiconductor device comprising an IC package on which an IC chip is mounted, an external lead arranged around the package, and a lead line connecting the IC chip and the external lead.
While forming the package into a polygonal shape, the IC
A semiconductor device characterized in that external leads are arranged around the periphery of a package.
JP17433486U 1986-11-12 1986-11-12 Pending JPS6379653U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17433486U JPS6379653U (en) 1986-11-12 1986-11-12

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17433486U JPS6379653U (en) 1986-11-12 1986-11-12

Publications (1)

Publication Number Publication Date
JPS6379653U true JPS6379653U (en) 1988-05-26

Family

ID=31112617

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17433486U Pending JPS6379653U (en) 1986-11-12 1986-11-12

Country Status (1)

Country Link
JP (1) JPS6379653U (en)

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