JPS6379312A - Semiconductor substrate - Google Patents
Semiconductor substrateInfo
- Publication number
- JPS6379312A JPS6379312A JP22352386A JP22352386A JPS6379312A JP S6379312 A JPS6379312 A JP S6379312A JP 22352386 A JP22352386 A JP 22352386A JP 22352386 A JP22352386 A JP 22352386A JP S6379312 A JPS6379312 A JP S6379312A
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- silicide
- compound semiconductor
- semiconductor substrate
- silicon substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 title claims abstract description 78
- 239000004065 semiconductor Substances 0.000 title claims abstract description 45
- 150000001875 compounds Chemical class 0.000 claims abstract description 34
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 33
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 33
- 239000010703 silicon Substances 0.000 claims abstract description 33
- 229910021332 silicide Inorganic materials 0.000 claims abstract description 21
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 claims abstract description 21
- 150000003377 silicon compounds Chemical class 0.000 claims abstract description 8
- 239000013078 crystal Substances 0.000 claims description 12
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 claims description 4
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 claims description 4
- RUFLMLWJRZAWLJ-UHFFFAOYSA-N nickel silicide Chemical compound [Ni]=[Si]=[Ni] RUFLMLWJRZAWLJ-UHFFFAOYSA-N 0.000 claims description 4
- 229910021334 nickel silicide Inorganic materials 0.000 claims description 4
- ZXEYZECDXFPJRJ-UHFFFAOYSA-N $l^{3}-silane;platinum Chemical compound [SiH3].[Pt] ZXEYZECDXFPJRJ-UHFFFAOYSA-N 0.000 claims description 2
- FHTCLMVMBMJAEE-UHFFFAOYSA-N bis($l^{2}-silanylidene)manganese Chemical compound [Si]=[Mn]=[Si] FHTCLMVMBMJAEE-UHFFFAOYSA-N 0.000 claims description 2
- 229910021357 chromium silicide Inorganic materials 0.000 claims description 2
- 229910017052 cobalt Inorganic materials 0.000 claims description 2
- 239000010941 cobalt Substances 0.000 claims description 2
- GUTLYIVDDKVIGB-UHFFFAOYSA-N cobalt atom Chemical compound [Co] GUTLYIVDDKVIGB-UHFFFAOYSA-N 0.000 claims description 2
- 229910052741 iridium Inorganic materials 0.000 claims description 2
- GKOZUEZYRPOHIO-UHFFFAOYSA-N iridium atom Chemical compound [Ir] GKOZUEZYRPOHIO-UHFFFAOYSA-N 0.000 claims description 2
- 229910052742 iron Inorganic materials 0.000 claims description 2
- 229910021338 magnesium silicide Inorganic materials 0.000 claims description 2
- YTHCQFKNFVSQBC-UHFFFAOYSA-N magnesium silicide Chemical compound [Mg]=[Si]=[Mg] YTHCQFKNFVSQBC-UHFFFAOYSA-N 0.000 claims description 2
- 229910052763 palladium Inorganic materials 0.000 claims description 2
- 229910021339 platinum silicide Inorganic materials 0.000 claims description 2
- 229910052703 rhodium Inorganic materials 0.000 claims 1
- 239000010948 rhodium Substances 0.000 claims 1
- MHOVAHRLVXNVSD-UHFFFAOYSA-N rhodium atom Chemical compound [Rh] MHOVAHRLVXNVSD-UHFFFAOYSA-N 0.000 claims 1
- 229910021341 titanium silicide Inorganic materials 0.000 claims 1
- 229910052751 metal Inorganic materials 0.000 abstract description 5
- 239000002184 metal Substances 0.000 abstract description 5
- 238000006243 chemical reaction Methods 0.000 abstract description 4
- 238000010438 heat treatment Methods 0.000 abstract description 4
- 230000015572 biosynthetic process Effects 0.000 abstract 1
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 10
- 238000000034 method Methods 0.000 description 7
- 239000010408 film Substances 0.000 description 6
- 229910052732 germanium Inorganic materials 0.000 description 6
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 6
- 229910052759 nickel Inorganic materials 0.000 description 5
- 230000000694 effects Effects 0.000 description 3
- 230000003287 optical effect Effects 0.000 description 3
- 238000004544 sputter deposition Methods 0.000 description 3
- 239000010409 thin film Substances 0.000 description 3
- 238000004140 cleaning Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 229910005347 FeSi Inorganic materials 0.000 description 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- 229910008484 TiSi Inorganic materials 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 238000005755 formation reaction Methods 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 238000002207 thermal evaporation Methods 0.000 description 1
Landscapes
- Recrystallisation Techniques (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は半導体湊コに係り、特にシリコン基板上にｍ−
ｖｓ化合物半導体を接合して用いる半導本基板に関する
。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor port, and in particular to a semiconductor chip on a silicon substrate.
The present invention relates to a semiconductor substrate used by bonding a vs. compound semiconductor.
従来、シリコン基板上に形成するｔｎ−ｖ涙化合物半導
体としては、格子定数の近いＧａＰを成長させて比較的
良質の結晶全得た例はあるがシリコン結晶と格子定数の
異なる■−■族化合物半導体の場合には、良質の結晶と
成長させることは困雅であり、通常の方法で成長させる
と多結晶の成長層となることがある。Conventionally, as a tn-v tear compound semiconductor formed on a silicon substrate, there have been examples in which relatively high quality crystals were obtained by growing GaP with a similar lattice constant, but In the case of semiconductors, it is difficult to grow high-quality crystals, and growing them using normal methods may result in a polycrystalline growth layer.
そのため、従来、シリコン基板と■−■族化合物半導体
の間に中間層を採入する方法が提案されている。すなわ
ち、ＱａＡｓ結晶に対しては、シリコン基板上にＧ ａ
Ａ ３結晶と格子定数の近いゲルマニウム層を成長さ
せ、その上に目的とするＧａＡＳ結晶の成長を行なう。For this reason, conventional methods have been proposed in which an intermediate layer is provided between the silicon substrate and the ■-■ group compound semiconductor. That is, for QaAs crystal, Ga
A germanium layer having a lattice constant similar to that of the A3 crystal is grown, and a target GaAS crystal is grown thereon.
この方法においては、シリコン基板とＱ ａ Ａ Ｓ結
晶の間の格子不整は、シリコン基板とゲルマニウム層の
間で吸収されることになる。しかしながら、この方法で
は。In this method, the lattice mismatch between the silicon substrate and the Q a S crystal will be absorbed between the silicon substrate and the germanium layer. However, with this method.
シリコン基板上に形成したゲルマニウム層の結晶性が十
分でないこと、および、ゲルマニウムの蒸気圧が高く、
ＧａＡＳ結晶中への拡散係数も大きいので、ＱａＡｓ結
晶／Ｊがゲルマニウムで汚染されることなどの問題があ
った。The crystallinity of the germanium layer formed on the silicon substrate is insufficient, and the vapor pressure of germanium is high.
Since the diffusion coefficient into the GaAS crystal is also large, there have been problems such as the QaAs crystal/J being contaminated with germanium.
一方、たとえば特開昭６０−１２７２４に記載のように
、上記中間層を目的とする■−■族化合物半導体とそれ
と格子定数の近い他の■−■族化合物半導体との交互層
で構成する方法も提案されている。この方法では、上記
ゲルマニウムを中間層に用いた場合のように、中間層か
らのドーピングがなくなるという利点がある反面、再現
性良く、良質の単結晶を成長させることが非常に困難で
あることが予想される。On the other hand, for example, as described in JP-A No. 60-12724, there is a method in which the intermediate layer is composed of alternating layers of a ■-■ group compound semiconductor intended for the purpose and another ■-■ group compound semiconductor having a similar lattice constant. has also been proposed. This method has the advantage of eliminating doping from the intermediate layer, as in the case of using germanium in the intermediate layer, but on the other hand, it is extremely difficult to grow high-quality single crystals with good reproducibility. is expected.
上記従来技術では、シリコン基板とＱ ａ Ａ Ｓ結晶
との格子不整合を緩和するために中間層を採入している
にもかかわらず、中間層上に■−Ｖ族化合物半導体薄膜
を積み重ねて成長させることが必要なため、目的とする
■−ｖ族化族化合物半導膜薄膜中晶欠陥が容易に導入さ
れる可能性があり、高品質の薄１漢を成長させることが
非常に困難であるという問題があった。In the above conventional technology, although an intermediate layer is adopted to alleviate the lattice mismatch between the silicon substrate and the QaA S crystal, the ■-V group compound semiconductor thin film is stacked on the intermediate layer. Because it requires growth, crystal defects may be easily introduced into the target ■-V group compound semiconductor thin film, making it extremely difficult to grow a high-quality thin film. There was a problem that.
本発明の目的は、シリコン基板上に■−■族化合物半導
体基板を中間層を介して接合することによりシリコン基
板上に高品質の■−■族化合物半導体層と有する半導体
基板を提供することにある。An object of the present invention is to provide a semiconductor substrate having a high quality ■-■ group compound semiconductor layer on a silicon substrate by bonding the ■-■ group compound semiconductor substrate to the silicon substrate via an intermediate layer. be.
上記目的は、シリコン基板および■−■族化合物半導体
基板とそれぞれ個別に作表してから両者を接合すること
により達成される。そのために。The above object is achieved by separately tabulating the silicon substrate and the ■-■ group compound semiconductor substrate, and then bonding them together. for that.
本発明では、シリコン基板および■−ｖ化合物半導体基
板をシリコン化合物からなる中間層を介在させて接合す
る。In the present invention, a silicon substrate and a -v compound semiconductor substrate are bonded with an intermediate layer made of a silicon compound interposed therebetween.
第１の方法として、ｍ−ｖ族化合物°半導体基板の裏面
にシリサイドを形成し得る金属膜を蒸着した後、該金属
膜面とシリコン基板表面とが蒸着するように、■−Ｖ族
化合物半導体基板とシリコン基板上に重ね合わせる。超
高真空中にて、上記両基板を密着させたまま低温加熱す
ることにより。As a first method, a metal film capable of forming silicide is deposited on the back surface of an m-v group compound semiconductor substrate, and then a ■-V group compound semiconductor Lay it on the substrate and silicon substrate. By heating the above-mentioned substrates at a low temperature in an ultra-high vacuum while keeping them in close contact with each other.
金属膜とシリコン基板との界面においてシリサイド反応
が進行するため、シリコン基板と■−Ｖ族化合物半導体
基板と？シリサイド層？介して接合することができる。Because the silicide reaction progresses at the interface between the metal film and the silicon substrate, the silicon substrate and ■-V group compound semiconductor substrate? Silicide layer? It can be joined through.
第２の方法として、■−■化合物半導体基板の裏面に直
接シリサイド層と形成した後、シリコン基板表面に密着
させて低温加熱することにより。As a second method, after forming a silicide layer directly on the back surface of a compound semiconductor substrate, the silicide layer is brought into close contact with the surface of a silicon substrate and heated at a low temperature.
両基板を接合することができる。 −〔作用〕
本発明では１個別に作製したシリコン基板および［１−
Ｖ族化合物半導体基板とを接合するために、両基板界面
におけるシリコン化合物形成反ｉｔ利用しており、その
ために、シリコン基板上に高品質のＩＩＩ−Ｖ族化合物
半導体を形成することができる。Both substrates can be bonded. - [Function] In the present invention, 1 individually fabricated silicon substrate and [1-
In order to bond the group V compound semiconductor substrate, a silicon compound formation reaction at the interface between both substrates is utilized, and therefore a high quality III-V compound semiconductor can be formed on the silicon substrate.
また、比較的低温で形成されるシリコン化合物を用いる
ことにより、シリコン基板および■−■族化合物半導体
基板上にあらかじめ形成した素子を損なうことなく、両
基板と接合することができる。In addition, by using a silicon compound formed at a relatively low temperature, it is possible to bond the silicon substrate and the ■-■ group compound semiconductor substrate without damaging the elements previously formed on both the substrates.
以下、実施例により本発明の詳細な説明する。 Hereinafter, the present invention will be explained in detail with reference to Examples.
実施例Ｉ
ＧａＡＳチツフ裏面をＡｒスパッタリングにより清浄化
した後、を子ビームによる加熱蒸発蒸着によりニッケル
を１００人蒸潰した。また、シリコン基板（ｐ型１面方
位（１００））表面を同様のＡｒスパッタリングにより
清浄化し、上記ＱａＡｓ基板のニッケル膜面とシリコン
基板表面とを密着させた。以上の操作は１超高真空中ｆ
ｌｏ−９Ｐａ）で行なうようにし、接触面表面に酸素等
の不純物原子が吸着することを防止するようにした。上
記両基板を接触させたまま、超高真空中で２５０Ｃで１
０分間加熱保持することにより、ニッケル膜とシリコン
基板表面との境界面でシリサイド反応が進行し、第１図
に示したように接合を完了した。Example I After cleaning the back surface of the GaAS chip by Ar sputtering, nickel was evaporated by 100 layers by thermal evaporation deposition using a laser beam. Further, the surface of the silicon substrate (p-type monoplane orientation (100)) was cleaned by similar Ar sputtering, and the nickel film surface of the QaAs substrate and the silicon substrate surface were brought into close contact. The above operations are performed in an ultra-high vacuum.
lo-9 Pa) to prevent impurity atoms such as oxygen from being adsorbed on the contact surface. While keeping both the above substrates in contact, it was heated at 250C in an ultra-high vacuum.
By heating and holding for 0 minutes, a silicide reaction progressed at the interface between the nickel film and the silicon substrate surface, and the bonding was completed as shown in FIG.
このとき、接合境界１ｊ近傍の断面を透過電子顕微ａ観
察した結果、形成されたシリサイドはＮ１５ｉ。At this time, as a result of observing the cross section near the junction boundary 1j using a transmission electron microscope a, the formed silicide was N15i.
であることがわかった。また、ＱａＡｓ基板表面近傍に
は未反応のニッケルが残留していることがあったが、こ
れは、基板との接合強度と低下させるものではなかった
。It turned out to be. Further, although unreacted nickel sometimes remained near the surface of the QaAs substrate, this did not reduce the bonding strength with the substrate.
上記実施例では、ＩＩＩ−Ｖ族化合物半導体裏面にニッ
ケル膜を蒸１ｆ したが、シリコン基板表面にニッケル
膜を形成してから［−Ｖ族化合物半導体基板と密着させ
て加熱しても、上記実施例と同様にシリコン基板と旧−
Ｖ族化合物半導体基板とを接合することができた。In the above example, a 1f nickel film was vaporized on the back surface of the III-V group compound semiconductor. Similar to the example, the silicon substrate and the old −
It was possible to bond the V group compound semiconductor substrate.
実施例２
実施例１と同様にしてＧａＡｓチップ裏面と清浄化後、
スパッタ法により、ＱａＡｓ基板表面に厚さ１００人の
ニッケルシリサイド（Ｎｌｓｉ２）を直接形成するっ上
記ニッケルシリサイド膜とシリコン基板表面とが密着す
るようにＱａＡｓ基板？重ね合わせ、超高真空中におい
て２５０Ｃで加熱保持することＫより、シリサイド膜と
シリコン基板との境界面近傍で反応を生じ、ＱａＡｓ基
板をシリコン基板上に接合することができた。Example 2 After cleaning the back surface of the GaAs chip in the same manner as in Example 1,
By sputtering, nickel silicide (Nlsi2) is directly formed on the surface of the QaAs substrate to a thickness of 100 nm. By overlapping and heating and holding at 250 C in an ultra-high vacuum, a reaction occurred near the interface between the silicide film and the silicon substrate, and the QaAs substrate could be bonded to the silicon substrate.
また、シリコン基板表面にニッケルシリサイド（Ｎｉ８
ｉｚ）を直接形成してから旧−■化合物半導体基板と密
着させて加熱しても、上記実施例と同様にシリコン基板
とｉｌｌ −Ｖ化合物半導体基板とを接合することがで
きた。In addition, nickel silicide (Ni8
Even if the silicon substrate and the ill-V compound semiconductor substrate were directly formed and then heated in close contact with the old -V compound semiconductor substrate, it was possible to bond the silicon substrate and the ill-V compound semiconductor substrate in the same manner as in the above embodiment.
実施例３
実施例１お工び実施例２で用いたニッケルシリサイド（
Ｎ ｉｓ ’ ｚ ＋ Ｎ ｔ ８ ’ ）の他に、
プラチナシリサイド（Ｐｔ２Ｓｉ、Ｐｔ８ｉ ）、パラ
ジウムシリサイド（ｐｄ、８ｉ ）、マグネシウムシ
リサイド（Ｍｇｚ Ｓ ｉ ） 、 コバルトシリサ
イド（ＣＯｚＳｊ。Example 3 Nickel silicide used in Example 1 and Example 2
In addition to N is ' z + N t 8 '),
Platinum silicide (Pt2Si, Pt8i), palladium silicide (pd, 8i), magnesium silicide (MgzS i ), cobalt silicide (COzSj.
Ｃｏ５１）、ｆタンシｌ）サイ）”（ＴｉＳｉ）、 ク
ロムノリサイド（Ｃｒ Ｓｔｚ ） ｓマンガンシリサ
イド（ＭｎＳｉ２ ） 、 ｏジウムシリサイド（Ｒｈ
Ｓｉ）。Co51), TiSi), chromium silicide (CrStz), manganese silicide (MnSi2), odium silicide (Rh)
Si).
鉄シリサイド（ＦｅＳｉ）ｔイリジウムシリサイド（Ｉ
ｒＳｉ ）のうちから選ばれた少なくとも１種を用いる
ことにより、上記実施例と同様にシリコン基板と■−ｖ
族化合物半導体基板とと接合することができた。Iron silicide (FeSi) t Iridium silicide (I
rSi) By using at least one selected from
It was possible to bond with a group compound semiconductor substrate.
以上説明したように、本発明によれば、シリコン基板上
に■−■族化合物半導体基板をシリコン化合物からなる
中間層を介して接合するため、■−Ｖ族化合吻半導体の
結晶性を低下せしめることがなく、半導体基板の信禎性
および品質を著しく向上できる効果がある。As explained above, according to the present invention, since the ■-■ group compound semiconductor substrate is bonded to the silicon substrate via the intermediate layer made of a silicon compound, the crystallinity of the ■-V group compound semiconductor is reduced. This has the effect of significantly improving the reliability and quality of semiconductor substrates.
さらに、シリコン基板上に形成した素子と■−Ｖ族化合
物半導体基板上に形成した素子を有機的に接続して回路
？形成することも可能となるが、そのため、シリコンＩ
ＣＫＩＩ［−Ｖ族化合物半導体の発光機能を持たせる
ことができ、光通信用光中継器のワンチップ化、大型コ
ンピュータ内Ｉ Ｃ間の光配線などが可能となる半導体
装置を提供できる効果がある。Furthermore, a circuit is created by organically connecting elements formed on a silicon substrate and elements formed on a -V group compound semiconductor substrate. It is also possible to form silicon I.
The CKII [-V group compound semiconductor can have a light emitting function, and has the effect of providing a semiconductor device that enables one-chip optical repeaters for optical communication, optical wiring between ICs in large computers, etc. .
上記実施例ではシリコン基板上へのＩ−Ｖ族化合物半導
体基板の接合について示したが、他の基板例えば■−■
族化合物についても適用できることは明らかである。In the above embodiment, bonding of an IV group compound semiconductor substrate onto a silicon substrate was shown, but other substrates such as ■-■
It is clear that the present invention is also applicable to group compounds.
第１図は本発明の一実施例を示す断面図である。
１・・・■−■化合物半導体基板、２・・・シリコン基
板、３・・・中間層（シリコン化合物）。
７−′″−／ パゝ
代理人 弁理士 小川勝馬・、〉ｊ０
キ ＩＩ！ＩFIG. 1 is a sectional view showing one embodiment of the present invention. 1... ■-■ Compound semiconductor substrate, 2... Silicon substrate, 3... Intermediate layer (silicon compound).
7-′″-/ Pa agent Patent attorney Katsuma Ogawa,〉j0 Ki II!I
Claims (1)
介在させることによりIII−Ｖ族化合物半導体結晶を接
合したことを特徴とする半導体基板。 ２、上記半導体装置において、中間層に用いるシリコン
化合物として、ニッケルシリサイド、プラチナシリサイ
ド、パラジウムシリサイド、マグネシウムシリサイド、
コバルトシリサイド、チタンシリサイド、クロムシリサ
イド、マンガンシリサイド、ロジウムシリサイド、鉄シ
リサイド、イリジウムシリサイドの中から選ばれた少な
くとも１種を用いることを特徴とする特許請求の範囲第
１項記載の半導体基板。[Scope of Claims] 1. A semiconductor substrate, characterized in that a III-V compound semiconductor crystal is bonded to the silicon substrate by interposing an intermediate layer made of a silicon compound. 2. In the above semiconductor device, as the silicon compound used for the intermediate layer, nickel silicide, platinum silicide, palladium silicide, magnesium silicide,
The semiconductor substrate according to claim 1, characterized in that at least one selected from cobalt silicide, titanium silicide, chromium silicide, manganese silicide, rhodium silicide, iron silicide, and iridium silicide is used.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP22352386A JPS6379312A (en) | 1986-09-24 | 1986-09-24 | Semiconductor substrate |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP22352386A JPS6379312A (en) | 1986-09-24 | 1986-09-24 | Semiconductor substrate |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6379312A true JPS6379312A (en) | 1988-04-09 |
Family
ID=16799475
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP22352386A Pending JPS6379312A (en) | 1986-09-24 | 1986-09-24 | Semiconductor substrate |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6379312A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5977604A (en) * | 1996-03-08 | 1999-11-02 | The Regents Of The University Of California | Buried layer in a semiconductor formed by bonding |
| US6015980A (en) * | 1996-03-08 | 2000-01-18 | The Regents Of The University Of California | Metal layered semiconductor laser |
-
1986
- 1986-09-24 JP JP22352386A patent/JPS6379312A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5977604A (en) * | 1996-03-08 | 1999-11-02 | The Regents Of The University Of California | Buried layer in a semiconductor formed by bonding |
| US6015980A (en) * | 1996-03-08 | 2000-01-18 | The Regents Of The University Of California | Metal layered semiconductor laser |
| US6208007B1 (en) | 1996-03-08 | 2001-03-27 | The Regents Of The University Of California | Buried layer in a semiconductor formed by bonding |
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