JPS6066811A - Manufacture of compound semiconductor device - Google Patents

Abstract

PURPOSE:To form a compound semiconductor layer having excellent lattice matching property on an Si substrate by forming a Ge layer on the Si substrate which is previously subjected to a high temperature heat processing and then forming a III-V group compound semiconductor through the heat processing. CONSTITUTION:An Si substrate 6 is held for the specified period at a temperature just under the melting point and is then cooled rapidly up to a room temperature. After removing a substrate oxide film, Ge 7 is formed by the epitaxial growth on the surface of substrate 6. A secondary heat processing is carried out for introducing mutual diffusion between the formed Ge thin film 7 and the substrate 6. Thereby, diffusion is carried out mutually between the substrate 6 and layer 7 and a diffusion layer is formed. Lattice distortion based on difference of thermal expansion coefficient is alleviated by such mutual diffusion. As a result, a compound semiconductor layer can be formed on the Si substrate and high quality, low cost and light-weight compound semiconductor device can be obtained.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The present invention relates to the manufacturing capacity of compound semiconductor devices, and more particularly to heat treatment of semiconductor devices in which a silicon substrate is used and a compound semiconductor is laminated on this substrate.

It is.

<Prior art> Compound semiconductors such as GaAs are being used for highly functional and high performance devices by taking advantage of their excellent characteristics (Kawa.

However, compound semiconductor crystals generally have a value of 1, and a silicon substrate (hereinafter referred to as 1 board) is used as a substrate, and a compound semiconductor layer is laminated on this silicon substrate (hereinafter referred to as 1 board) to form a compound semiconductor to form a °C device. Several methods for producing Pl have been proposed in the past. However, it is still inferior to bulk crystals in terms of crystal quality, etc.

For example, there is an attempt to form a GaAs layer on the second layer of a Si substrate.

The first method is to use molecular epitaxy (epitaxy) on the 81 substrate.
E) or a method of directly forming a GaAs layer using JIT using an organometallic thermal decomposition method (?t, fOCVD). FIG. 1 shows a first example of the epitaxial growth of a compound semiconductor 2 onto an 81 substrate 1]. Si substrate 1 and G a A
1 due to the large difference (4%) in lattice constant between the s crystals 2
- In the conventional method, it is impossible to produce a crystalline layer of excellent quality, and only polycrystals can be obtained. Also S
The adhesive force between the interface between 1 and G a A s is weak and it easily breaks off due to the stress caused by the difference in the coefficient of thermal expansion.
At present, the formation of aAs single crystals has not been successful.

Second Jj/,! , utilizes a /111 product system with a lattice constant between Si and GaAs. For example, 5i
Ge.

A lattice matching layer in which the mixture composition of GHIAsl''ji is slightly changed is formed between Sl and GaAs to reduce the influence on crystallinity due to lattice strain degree matching.Second. The figure shows a second method example of epitaxial growth of a compound semiconductor 5 with a lattice matching layer 4 onto an 81 substrate 3''. In this method, there is peace of mind that the rate of change in the lattice constant of the lattice matching layer 4 is as small as possible, so the growth is controlled in multiple ways. In order to suppress the influence of internal stress in the lattice matching layer 4, it is necessary to increase the thickness of the lattice matching layer 4. In the case of Sl and GaAs, the lattice matching layer required to satisfy the above requirement J[5 is several tens of μI
The thickness of the active layer is usually several times to several tens of times (−
Hlt, and is a method that violates the requirements of low cost and weight reduction.

<Object of the Invention> The present invention [j) eliminates the drawbacks of the manufacturing method of the conventional compound semiconductor device 1;
rI with a III-V group mixed single crystal as the active layer.
In S compound semiconductor devices, the influence of lattice mismatch between the substrate and the compound conductor layer on the crystallinity and the crystallographic absorption due to the difference in thermal expansion coefficient; The present invention provides a JJ method for manufacturing a compound semiconductor device that enables high quality, low cost, and one-shot IIr quantification by providing a chemical layer.

<Example> In the case of forming a compound semiconductor layer on the S1 substrate of the present invention, the S1 substrate is prepared in advance when manufacturing a compound semiconductor device having a structure in which a layer for mitigating lattice mismatch is newly provided. A first heat treatment is performed to maintain the temperature just below the melting point, and a Ge1ii-11 thin IJ is carved on the substrate that has undergone the first heat treatment, followed by a second heat treatment and the first heat treatment. A compound semiconductor device is manufactured by forming a 4[1 interdiffused layer of Sl and Ge by a second heat treatment.

The present invention will be described below with reference to FIG. 3 by way of an example.

J, [81 single crystal with plane orientation (+00) is used as plate 6. This S i 4J plate 6 is held at a temperature of 1300'C for 30 minutes in a vacuum below IQ'' Torr and rapidly cooled to room temperature (first heat treatment).
After vapor phase coating with CE, Ge was deposited on the surface of the SL substrate.
7 was subjected to vapor phase growth at approximately 500 A.

kojJ) and Q゛no growth 1';ll'1 degree is 70Crc
And so. After that, in H2゛, 17 atmosphere Q (l O'
After performing a second heat treatment for 60 minutes, it is slowly cooled to 700°C, and at that temperature, GaAs8 is epitaxially grown to a thickness of about 1 μm to form a compound-'1' conductor. Here, during the second heat treatment, diffusion occurs between the Si substrate 6 and the Ge layer 7, as will be described later, to form a diffusion layer.

In order to study the effect of the compound semiconductor (hereinafter referred to as the I-A sample) manufactured through the above steps, we immediately applied Ge at 500A to the 81 substrate without the first heat treatment as a
After forming a single crystal thin layer and performing only the second heat treatment, Ga
A sample was prepared in which an As single crystal layer was epitaxially grown in vapor phase (hereinafter referred to as I: 13 samples M'l).

” - Observation of the cross sections of samples A and B using a scanning electron microscope (i) and mirror reveals that in sample B, the 5i-Ge world is completely iH;
l.

Although the rack is narrow and cracks can be seen at the interface, I did A.
Such defects were observed in the sample /4- or-.

In addition, in sample B, stress concentration occurs from the edge of the crack.

A large number of thin lines, which are thought to be caused by dislocations, were observed propagating in the direction of the grown layer. , the defect GJ1 near the interface A] as shown in 1 below is subjected to the first heat treatment T'/+
It was also observed for samples lacking heat treatment.

This means that during the second heat treatment at 900°C for 60 minutes in sample A, a mutually diffused layer of Sl and Ge is formed through the pores introduced in advance in the first heat treatment at 1300°C. This is thought to be because the lattice strain caused by the difference in thermal expansion coefficients is alleviated by the diffusion layer.

No defects such as edge lines or low-angle grain boundaries were observed in the GaAs layer formed on the interdiffused layer of 81 and Ge, and a surface layer with a 1'1'1 u surface layer was obtained. .

Compound body '+j formed on the mutual diffusion layer of 31 and Gc,
The body is just right! The first layer is not limited to Gr+A s but also GaP.
binary compounds such as GaA, (As, InGaP,
It can be formed in the same way even if it is a king box thread such as GaAsP or a multi-component compound such as 1nGaAsP. In addition, the first heat treatment is performed at a temperature of 1300"C, but it is limited to this temperature.) 1 (The temperature range of 90 or higher than the melting point of the plate is sufficient.) +30 degrees
It is enough to hold it for about 31 minutes. Historically, the grain f'l that forms the interdiffusion layer in the second heat treatment is 700 to 90.
Interdiffusion can occur at a temperature of 0°C by holding for 1' min/C time, and even at temperatures below 700°C, the same effect of 1k can be obtained by increasing the holding time. The Ge medium crystalline thin layer formed on the 81 substrate has sufficient dilatation to alleviate lattice strain. J.

300-700A due to the necessity of forming a layer 6. It is sufficient if the thickness is about 100 oz. In addition, 11' formed on the interdiffusion layer
It goes without saying that the F7 semiconductor semiconductor single crystal layer can be formed to have a thickness depending on the requirements.

The above SI substrate I was previously subjected to high-temperature heat treatment (I was formed by forming a Ge layer and then performing heat treatment again)
l-~r group compound semiconductor 6j1 various? [It can be used as a semiconductor substrate for εf devices, especially when a solar cell is constructed by forming a PN junction on a compound semiconductor.3. That is, the light-receiving surface side is constructed using a Ga A, s layer with high photoelectric conversion efficiency, and this G
The substrate supporting the aAs layer can be constructed using a relatively light 81 substrate, making it possible to construct a 7 (I) field cell which is very advantageous in terms of efficiency and weight.

<Effects> As described above, according to the present invention, the effect of the present invention is as follows:
qH'/-I of good GaAs, GaAp, ΔS, etc. outside the building
It is possible to form II-vIj5' compound +11 crystals, and the production of high-quality, low-cost, lightweight compound semiconductor devices will become an iTJ function, contributing to higher functionality and higher performance of compound semiconductor devices. can.

[Brief explanation of drawings]

Figures 1 and 2 show i1'J of a conventional compound semiconductor device.
The second figure and the second side figure are sectional views for explaining one embodiment of the present invention. 6.81 Substrate 7 Ge single crystal layer 8 G:1As single crystal layer

Claims (1)

[Claims] l) In a method of forming a compound semiconductor layer on a silicon substrate, the first step is to maintain the silicon substrate at a temperature just below its melting point.
a heat treatment step, a step of forming a germanium thin layer on the substrate subjected to the first heat treatment, and a second heat treatment to induce phase J-L diffusion between the formed germanium thin layer and the silicon substrate. 11. A method for manufacturing a compound semiconductor device, which comprises forming and solidifying a compound semiconductor layer after a second heat treatment. 2) The compound semiconductor winding ring base layer is GaAs5 or GaA
j! The claim σ is characterized in that it is an As single crystal.
((Manufacture of the compound semiconductor device according to item 1). 3) The compound semiconductor crystal layer is GaP, GaAsP, or InGaAsP single crystal. GI':!'l' The method for manufacturing a compound semiconductor device according to claim 1.