JPS6376475A - Photoelectric conversion device - Google Patents

Abstract

PURPOSE:To obtain a photoelectric conversion device capable of reading out without reducing the output of photoelectric conversion cells and moreover, having a simple constitution by a method wherein the readout signals which are outputted from the photoelectric conversion cells are so contrived as to be directly read out on an output line at the time of readout operation. CONSTITUTION:The readout signals which are outputted from photoelectric conversion cells S1-Sn are so contrived as to be directly read out on an output line 103 at the time of readout operation. For example, the photoelectric conversion cells S1-Sn are arranged in a line type and a constant positive voltage is applied to the contact electrode 12 of each photoelectric conversion cell. Each capacitor electrode 7 is connected to each parallel output terminal of a scanning circuit (a) and each photoelectric conversion cell performs a readout operation or a reflesh operation according to the signals phih1-phihn from each output terminal. Moreover, each emitter electrode 8 is connected in common to the output line 103, the output line 103 is connected to an amplifier 105 with the output 103 earthed through a transistor 104 and the readout signals are outputted serially to the outside through the output terminal 106 of the amplifier 105.

Description

Detailed Description of the Invention [Industrial Application Field] The present invention accumulates carriers excited by light in the control electrode region by controlling the potential of the control electrode region of the transistor, and uses the accumulated voltage to increase the voltage of the transistor. The present invention relates to a photoelectric conversion device that has a plurality of photoelectric conversion cells whose output is controlled and outputs read signals from each photoelectric conversion cell to the outside through an output line.

[Prior Art] FIG. 5(A) is a schematic cross-sectional view of a photoelectric conversion cell described in JP-A-80-12759 to JP-A-80-12785, and FIG. 5(CB) is a It is an equivalent circuit diagram.

In both figures, photoelectric conversion cells are formed and arranged on an n+ silicon substrate 1, and each photoelectric conversion cell is 5i02
It is electrically insulated from adjacent photoelectric conversion cells by an element isolation region 2 made of , Si3 N4, polysilicon, or the like.

Each photoelectric conversion cell has the following configuration.

Low impurity concentration n formed by epitaxial technology etc.
A p region 4 is formed on the − region 3 by doping with p-type impurities, and an n medium region 5 is formed in the p region 4 by impurity diffusion technology, ion implantation technology, or the like. P region 4 and n medium region 5 are the base and emitter of a bipolar transistor, respectively.

An oxide film 6 is formed on the n- region 3 in which each region is formed in this manner, and a capacitor electrode 7 having a predetermined area is formed on the oxide film 6.

Capacitor electrode 7 faces p-region 4 with oxide film 6 in between, and applies a pulse voltage to capacitor electrode 7 to control the potential of p-region 4 in a floating state.

In addition, an emitter electrode 8 connected to the n medium region 5, an n+ region 11 with a high impurity concentration on the back surface of the substrate 1, and a collector electrode 12 for applying a potential to the collector of the bipolar transistor are formed.

Next, the basic operation will be explained. First, it is assumed that the p region 4, which is the base of the bipolar transistor, is in an initial state of negative potential. Light 13 enters from the p-region 4 side, and holes of the electron-hole pairs generated by the incident light are accumulated in the p-region 4, and the accumulated holes change the potential of the p-region 4 in the positive direction. rise (accumulation action).

Subsequently, a positive voltage pulse for readout is applied to the capacitor electrode 7, and a readout signal corresponding to the base potential change during the storage operation is output from the floating emitter electrode 8 (readout operation). Since the amount of accumulated charge in p region 4 hardly decreases, the read operation can be reversed.

Further, in order to remove the holes accumulated in the p region 4, the emitter electrode 8 is grounded and a positive voltage refresh pulse is applied to the capacitor electrode 8. By applying this pulse, the p region 4 is forward biased with respect to the n medium region 5, and the accumulated holes are removed. Then, when the refresh pulse falls, the p region 4 returns to the initial state of negative potential (refresh operation).
Each operation of reading and refreshing is repeated.

FIG. 6 is a circuit diagram showing a conventional example of a sensor line using the photoelectric conversion cell and its driving circuit.

In the figure, a constant voltage is applied to each collector electrode 12 of the photoelectric conversion cell S1''Sn.

Each capacitor electrode 7 is commonly connected to a terminal 110, and a signal φ1 for performing a read operation and a refresh operation is applied to the terminal 110. In addition, each emitter electrode 8
are connected to the vertical lines Ll-Ln, respectively, and the vertical line L
1xLn are buffer transistors Tal to Tan, respectively.
connected to one main electrode of the

The gate electrodes of the buffer transistors Ta1 to Tan are commonly connected to a terminal 111, and a signal φ2 is connected to the terminal 111.
is applied. In addition, buffer transistors Ta1~
The other main electrode of Tan is grounded via charge storage capacitors 61 to Gn as storage means, and is also connected to the output line 103 via transistors RT1 to RTn. Transistor RTi~
The gate electrodes of RTn are each connected to parallel output terminals of the shift register.

Signals φh1 to φhn are sequentially output from the parallel output terminals.

The output line 103 is grounded via a transistor Tr for refreshing the output line 103.

A signal φf2 is applied to the gate electrode of the transistor Tr.

Further, the vertical lines L1 to Ln are grounded via buffer transistors b1 to bn, respectively. The gate electrodes of buffer transistors Tb, ~Tbn are connected to terminal 1.
12, and a signal φ3 is applied to the terminal 112.

In such a configuration, a read operation is performed as follows.

It is assumed that carriers corresponding to the illuminance of incident light are accumulated in each of the photoelectric conversion cells S1 to Sn.

In this state, turn on the buffer transistors Ta1 to Tan and turn off the buffer transistors Tb and Tbn.
The emitter electrode 8 is placed in a floating state, and a positive voltage pulse for reading is applied to the terminal 110. As a result, as described above, the output signals of the respective photoelectric conversion cells are read out onto the vertical lines L1 to Ln, and each signal is stored in the charge storage capacitors C1 to Cn.

Then, the buffer transistors Tal to Tan are turned off.
As F, the shift register is operated and the transistor T1
-Tn are turned ON sequentially. By this, capacitor 01
Each signal accumulated in ~Cn is sequentially output to the output line 103.
is read out and output to the outside through an amplifier.

[Problems to be Solved by the Invention] Conventionally, the output signal of a photoelectric conversion cell is accumulated in a capacitor connected to a vertical line or in a wiring capacitance of a vertical line, and then sequentially read out to the output line, and the signal is serially output. was being output to the outside.

However, since a capacitance channel also exists in the output line, the level of the signal accumulated in the wiring capacitance of the vertical line or the capacitance Cv of the capacitor decreases due to capacitance division.
In particular, as the number of photoelectric conversion cells increases, the level decrease becomes more remarkable.

Specifically, when the signal voltage V accumulated in the capacitors 01 to Cn with the capacitance Cv is transferred to the output line 103 of the capacitor ch, the signal voltage V is reduced by a factor of Cv/(Cv+Ch) due to capacitance division. In a high-resolution sensor with a large number of photoelectric conversion cells, the wiring capacitance ch of the output line is not large, so that the output level decreases significantly.

These problems are not limited to the line sensor mentioned above.
The same applies to area sensors.

The present invention aims to solve the above-mentioned conventional problems, and its purpose is to provide a photoelectric conversion device that can read without reducing the output of a photoelectric conversion cell and has a simple configuration. It is in.

[Means for Solving the Problems] A photoelectric conversion device according to the present invention includes an accumulation operation of accumulating carriers generated by photoexcitation in the control electrode region by controlling the potential of the control electrode region of a semiconductor transistor; a read operation for reading out a signal controlled by the accumulated voltage generated by accumulation;
In a photoelectric conversion device that includes a plurality of photoelectric conversion cells that perform a refresh operation to eliminate accumulated carriers, and outputs a read signal during the read operation to the outside through an output line, the photoelectric conversion cell It is characterized in that a readout signal output from the output line is directly read out to the output line.

[Function] In this way, since the output of the photoelectric conversion cell is directly read out to the output line, the high output of the photoelectric conversion cell can be read out without any reduction in output due to capacitance division as in the conventional case.

[Example] Embodiments of the present invention will be described in detail below with reference to the drawings.

FIG. 1 is a circuit diagram of a first embodiment of a photoelectric conversion device according to the present invention.

In the figure, the photoelectric conversion cells S1 to Sn shown in FIG. 5 are arranged in a line, and the collector electrode 1 of each photoelectric conversion cell is
2 is applied with a constant positive voltage. Each capacitor electrode 7 is connected to a parallel output terminal of a scanning circuit, and each photoelectric conversion cell performs a read operation or a refresh operation by signals φh1 to φhn from each output terminal.

Further, each emitter electrode 8 is commonly connected to an output line 103. Output line 103 is connected to transistor 10
4 and is connected to the amplifier 105. A read signal is serially output from the output terminal 106 of the amplifier 105 to the outside. Further, a signal φhrs is applied to the gate electrode of the transistor 104 to refresh the output line 103.

Next, the operation of this embodiment having such a configuration will be explained with reference to FIG.

FIG. 2 is a timing chart for explaining the operation of this embodiment.

(Refresh Operation) First, the transistor 104 is turned on by the signal φhrs, and the emitter electrode 8 of each photoelectric conversion cell is grounded through the output line 103.

Subsequently, signals φh1 to φh are output from the parallel output terminals of the scanning circuit.
n and sends a refresh pulse to the photoelectric conversion cells S1~
Sn is sequentially applied to the capacitor electrode 7. As a result, the refresh operation as described above is performed, and the carriers accumulated in the p pace region 4 are removed.

(Storage operation) No voltage is applied to the capacitor electrode 7, and the emitter electrode 8
is grounded, carriers are accumulated in the p base region 4 in an amount corresponding to the illuminance of the incident light.

(Reading Operation) After performing the storage operation for a certain period of time, the signal φhrs is set to a low level to turn off the transistor 104, and the output line 103 and the emitter electrode 8 are placed in a floating state.

Subsequently, first, the signal φh1 is output from the scanning circuit, and a read pulse is applied to the capacitor electrode 7 of the photoelectric conversion cell S1. As a result, the signal of the cell S1 is read out to the output line 103 and passed through the amplifier 105 to the output terminal 10.
6 is output as an output signal v1.

When the output signal Vi is output, the transistor 104 is turned on by the signal φhrs, and the output line 103 is turned on.
The remaining carriers are removed.

Similarly, signals φh2 to φhn are sequentially output from the scanning circuit, and read pulses are applied to the capacitor electrodes 7 of the photoelectric conversion cells S2 to Sn. Then, each output signal v2.
Every time v3 ・11@ is output from the output terminal 106, the transistor 104 turns on and the output line 1
03 is refreshed.

In this way, the signals from each of the photoelectric conversion cells S1 to Sn are directly read out to the output line 103 and output to the outside through the amplifier 105. Therefore, a high output signal from the photoelectric conversion cell appears on the output line 103, instead of a signal whose level has been lowered by capacitance division as in the conventional case.

Further, as shown in the figure, since the voltage applied to the capacitor electrode 7 is supplied by the scanning circuit, the configuration of one circuit is significantly simplified compared to the conventional one.

FIG. 3 is a circuit diagram of a second embodiment of the present invention. In addition,
Portions common to the first embodiment are given the same numbers.

In FIG. 3, switching transistors Q-Qn are connected between the emitter electrode 8 of each photoelectric conversion cell S1-Sn and an output line 103, and each gate electrode of the switching transistor Q1-Qn is connected to a corresponding photoelectric conversion cell. It is connected to the capacitor electrode 7 of the cell.

The operation timing of this embodiment is the same as that shown in FIG.

In the refresh operation, the output line 103 is grounded via the transistor 104, and the connected switching transistor is turned on by a refresh pulse. As a result, the emitter electrode 8 is grounded via the switching transistor and the output line 103, and carriers accumulated in the p base region 4 are removed as described above.

During the storage operation, the switching transistors Q1 to Qn are in the OFF state, and carriers corresponding to the illuminance of the incident light are stored in the floating P base region 4, as in the first embodiment. Since switching transistor QxNQn is in the OFF state, even if strong light is incident and the potential of p base region 4 rises and a signal is read out to the emitter side, the signal will not appear on output line 103.

In the read operation, the output line 103 is left in a floating state,
A read pulse is applied to the capacitor electrode 7. As a result, the switching transistor is turned on, and signals are read out in the same manner as in the first embodiment.

In this case, for example, when the read operation of the photoelectric conversion cell S1 is completed, the switching transistor Q1 is turned off and the output line 103 is refreshed. Therefore, when reading out the photoelectric conversion cell S2 as the primary,
Since no previous information remains on the output line 103 and the other switching transistors Q1 and Q3 to Qn are in the OFF state, only the signal of the photoelectric conversion cell S2 can be read out. That is, the switching transistors Q1 to Qn of this embodiment can prevent blooming and smearing.

In addition, although the above-mentioned each example showed the case of a line sensor, it is clear that it can be applied to an area sensor as it is, and the same effect can be obtained.

FIG. 4 is a schematic configuration diagram of an example of an imaging device using the above embodiment.

In the figure, an image sensor 301 has the configuration of each of the embodiments described above, and its output signal vO is subjected to processing such as gain adjustment by a signal processing circuit 302, and is output as a standard television signal such as an NTSC signal.

Further, various pulses φ for driving the image sensor 301 are supplied by a driver 303, and the driver 303 operates under the control of a control unit 304. In addition, the control unit 30
4 is a signal processing circuit 302 based on the output of the image sensor 301.
At the same time, the exposure control means 305 is controlled to adjust the amount of light incident on the image sensor 301.

As described above, since the image sensor 301 according to this embodiment can obtain a high-level output signal Vout, the burden of subsequent signal processing is reduced.

[Effects of the Invention] As explained above in detail, the photoelectric conversion device according to the present invention reads out the output of the photoelectric conversion cell directly to the output line, so that the output decrease due to capacitance division as in the conventional case does not occur.
When a large number of photoelectric conversion cells are formed at a high density, readout can also be performed at a high output level, which facilitates subsequent signal processing.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram of a first embodiment of a photoelectric conversion device according to the present invention. FIG. 2 is a timing chart for explaining the operation of this embodiment, FIG. 3 is a circuit diagram of a second embodiment of the present invention, and FIG. 4 is an example of an imaging device using the above embodiment. A schematic configuration diagram, FIG. 5(A) is a schematic cross-sectional view of a photoelectric conversion cell described in JP-A-60-12759 to JP-A-H-12785, FIG. 5(B) is its equivalent circuit diagram, No. 6
The figure is a circuit diagram showing a conventional example of a sensor line using the photoelectric conversion cell and its driving circuit. lφ battle・Substrate 3...N-epitaxial layer 4...P base region 5...N+ emitter region 7...Capacitor electrode 8...Emitter electrode 12...Collector electrode 103--e output Line 105...Amplifier 106 fist...Output terminal S1~5nIII photoelectric conversion cell Q1~Q11*φ fist switching transistor agent
Patent Attorney Jo Taira Yamashita Figure 1 Figure 2 Figure 3 Figure 4 Figure 5 (A) Figure 5 (B) Figure 6

Claims (3)

[Claims] (1) An accumulation operation in which carriers generated by photoexcitation are accumulated in the control electrode region by controlling the potential of the control electrode region of a semiconductor transistor, and a readout in which a signal controlled by the accumulated voltage generated by the accumulation is read out. In the photoelectric conversion device, the photoelectric conversion device has a plurality of photoelectric conversion cells that perform an operation and a refresh operation for extinguishing accumulated carriers, and outputs a read signal during the read operation to the outside through an output line. A photoelectric conversion device characterized in that a read signal output from a photoelectric conversion cell is directly read out to the output line. (2) The reading operation of the photoelectric conversion cells is performed by controlling the potential of the control electrode region of each photoelectric conversion cell using a control signal from a scanning circuit. Photoelectric conversion device. (3) A switch means is provided between each photoelectric conversion cell and the above output line, and during readout operation of each photoelectric conversion cell,
2. The photoelectric conversion device according to claim 1, wherein the corresponding switch means is closed.