JPS637496B2 - - Google Patents

Info

Publication number
JPS637496B2
JPS637496B2 JP4812780A JP4812780A JPS637496B2 JP S637496 B2 JPS637496 B2 JP S637496B2 JP 4812780 A JP4812780 A JP 4812780A JP 4812780 A JP4812780 A JP 4812780A JP S637496 B2 JPS637496 B2 JP S637496B2
Authority
JP
Japan
Prior art keywords
signal
output
terminal
data
flip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP4812780A
Other languages
English (en)
Japanese (ja)
Other versions
JPS56144655A (en
Inventor
Hiroichi Ootsuka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP4812780A priority Critical patent/JPS56144655A/ja
Publication of JPS56144655A publication Critical patent/JPS56144655A/ja
Publication of JPS637496B2 publication Critical patent/JPS637496B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/04—Speed or phase control by synchronisation signals
    • H04L7/041—Speed or phase control by synchronisation signals using special codes as synchronising signal
    • H04L7/044—Speed or phase control by synchronisation signals using special codes as synchronising signal using a single bit, e.g. start stop bit

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Time-Division Multiplex Systems (AREA)
JP4812780A 1980-04-14 1980-04-14 Character-multiplex system time-division multiplexer Granted JPS56144655A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4812780A JPS56144655A (en) 1980-04-14 1980-04-14 Character-multiplex system time-division multiplexer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4812780A JPS56144655A (en) 1980-04-14 1980-04-14 Character-multiplex system time-division multiplexer

Publications (2)

Publication Number Publication Date
JPS56144655A JPS56144655A (en) 1981-11-11
JPS637496B2 true JPS637496B2 (no) 1988-02-17

Family

ID=12794653

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4812780A Granted JPS56144655A (en) 1980-04-14 1980-04-14 Character-multiplex system time-division multiplexer

Country Status (1)

Country Link
JP (1) JPS56144655A (no)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4815074A (en) * 1986-08-01 1989-03-21 General Datacomm, Inc. High speed bit interleaved time division multiplexer for multinode communication systems

Also Published As

Publication number Publication date
JPS56144655A (en) 1981-11-11

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