JPS6371547U - - Google Patents
Info
- Publication number
- JPS6371547U JPS6371547U JP1987151521U JP15152187U JPS6371547U JP S6371547 U JPS6371547 U JP S6371547U JP 1987151521 U JP1987151521 U JP 1987151521U JP 15152187 U JP15152187 U JP 15152187U JP S6371547 U JPS6371547 U JP S6371547U
- Authority
- JP
- Japan
- Prior art keywords
- external
- lead
- insulator
- leads
- external leads
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/541—Dispositions of bond wires
- H10W72/5449—Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987151521U JPH0328511Y2 (https=) | 1987-10-02 | 1987-10-02 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987151521U JPH0328511Y2 (https=) | 1987-10-02 | 1987-10-02 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6371547U true JPS6371547U (https=) | 1988-05-13 |
| JPH0328511Y2 JPH0328511Y2 (https=) | 1991-06-19 |
Family
ID=31068670
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1987151521U Expired JPH0328511Y2 (https=) | 1987-10-02 | 1987-10-02 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0328511Y2 (https=) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100958422B1 (ko) * | 2003-01-21 | 2010-05-18 | 페어차일드코리아반도체 주식회사 | 고전압 응용에 적합한 구조를 갖는 반도체 패키지 |
| EP2899754A3 (en) * | 2014-01-27 | 2015-10-07 | Samsung Electronics Co., Ltd | Semiconductor device |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS588664A (ja) * | 1981-07-08 | 1983-01-18 | Nec Corp | マルチサイズ印刷装置 |
-
1987
- 1987-10-02 JP JP1987151521U patent/JPH0328511Y2/ja not_active Expired
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS588664A (ja) * | 1981-07-08 | 1983-01-18 | Nec Corp | マルチサイズ印刷装置 |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100958422B1 (ko) * | 2003-01-21 | 2010-05-18 | 페어차일드코리아반도체 주식회사 | 고전압 응용에 적합한 구조를 갖는 반도체 패키지 |
| EP2899754A3 (en) * | 2014-01-27 | 2015-10-07 | Samsung Electronics Co., Ltd | Semiconductor device |
| US9711435B2 (en) | 2014-01-27 | 2017-07-18 | Samsung Electronics Co., Ltd. | Semiconductor device |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0328511Y2 (https=) | 1991-06-19 |