JPS6369317A - Switch control circuit - Google Patents

Switch control circuit

Info

Publication number
JPS6369317A
JPS6369317A JP21439186A JP21439186A JPS6369317A JP S6369317 A JPS6369317 A JP S6369317A JP 21439186 A JP21439186 A JP 21439186A JP 21439186 A JP21439186 A JP 21439186A JP S6369317 A JPS6369317 A JP S6369317A
Authority
JP
Japan
Prior art keywords
signal
control
circuit
terminal
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP21439186A
Other languages
Japanese (ja)
Inventor
Masato Haraguchi
原口 正人
Yasuhiko Inoue
泰彦 井上
Tsuneyoshi Asada
朝田 常義
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP21439186A priority Critical patent/JPS6369317A/en
Publication of JPS6369317A publication Critical patent/JPS6369317A/en
Pending legal-status Critical Current

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  • Electronic Switches (AREA)

Abstract

PURPOSE:To obtain a control circuit for an electronic switch with simple constitution ensuring the power-on reset of a control object circuit by using a control confirming signal representing the on-state of the control object circuit so as to control an off-signal only when the power supply of the control object rises completely. CONSTITUTION:When a voltage level transits from a low level to a high level at an on-signal input terminal 1, a high level is outputted at a control signal output terminal 3 and the control object circuit is turned on. Thus, the high level signal representing the on-state switching of the control object circuit is inputted to the control confirmation signal terminal 4, and then an output of an off-signal to the control confirmation signal terminal 4 is attained. Before the high level signal representing the power voltage of the control object circuit reaching a voltage VDD and the control object circuit to be switched is inputted to the control confirmation signal terminal 4, even if the voltage level transits from the low level to the high level at the off-signal input terminal 2, no low level is outputted to the output control signal output terminal 3.

Description

【発明の詳細な説明】 産業上の利用分野 本発明はスイッチをオン・オフすることによりオン・オ
フの制御信号を発生・出力するスイッチ制御回路に関す
るものである。
DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a switch control circuit that generates and outputs on/off control signals by turning on and off a switch.

従来の技術 従来の電子式スイッチの制御回路を第3図に示す。この
回路14では一定電圧レベルの信号を11のオン信号入
力端子あるいは12のオフ信号入力端子に入力すること
により、制御対象回路のオン・オフに関係なく、13の
制御信号出力端子にオンあるいはオフの制御信号を出力
することがよく行なわれる。
BACKGROUND OF THE INVENTION A control circuit for a conventional electronic switch is shown in FIG. In this circuit 14, by inputting a signal at a constant voltage level to the 11 ON signal input terminals or the 12 OFF signal input terminals, the 13 control signal output terminals are turned ON or OFF, regardless of whether the circuit to be controlled is ON or OFF. It is often done to output a control signal.

発明が解決しようとする問題点 このような従来の回路では、制御対象回路のオン・オフ
状態にかかわらず制御端子にオフの制御信号を出力でき
る。しかしスイッチを高速でオン・オフを繰り返す場合
、制御対象回路の電源電圧が完全に立ち上がらない状態
が発生することがある。そのため制御対象回路の電源電
圧が制御対象回路のリセット電圧レベルを上下するよう
な場合が発生し、制御対象回路のリセットに必要なりセ
ット時間を確保できず、制御対象回路のパワーオンリセ
ットが確実に動作しないことがある。このような状態を
示すタイミング図を第4図に示す。
Problems to be Solved by the Invention In such a conventional circuit, an OFF control signal can be output to a control terminal regardless of whether the circuit to be controlled is on or off. However, when the switch is repeatedly turned on and off at high speed, a situation may occur in which the power supply voltage of the controlled circuit does not completely rise. As a result, the power supply voltage of the controlled circuit may rise or fall above or below the reset voltage level of the controlled circuit, making it impossible to secure the set time needed to reset the controlled circuit, making it difficult to ensure the power-on reset of the controlled circuit. Sometimes it doesn't work. A timing diagram showing such a state is shown in FIG.

第4図のvDDは制御対象回路がオンされた時の電源電
圧、vR3は制御対象回路のパワーオンリセットが発生
するスレショルド電圧、”R8はリセットのかかってい
る時間を表わす。”R8が制御対象回路の必要とする時
間よシも短い場合、制御対象回路が確実にリセットされ
ない。
In Fig. 4, vDD is the power supply voltage when the circuit to be controlled is turned on, vR3 is the threshold voltage at which power-on reset of the circuit to be controlled occurs, and "R8 represents the time during which the reset is applied." R8 is the target to be controlled. If the time required by the circuit is also shorter, the controlled circuit will not be reset reliably.

本発明はかかる点に鑑みてなされたもので、簡易な構成
で制御対象回路のパワーオンリセットが確実に動作する
電子式スイッチの制御回路を提供することを目的とする
The present invention has been made in view of the above problems, and an object of the present invention is to provide a control circuit for an electronic switch that has a simple configuration and can reliably perform power-on reset of a controlled circuit.

問題点を解決するための手段 本発明はスイッチをオン・オフすることにより、オン・
オフの制御信号を発生・出力する電子式スイッチの制御
回路にオン信号を入力するオン信号入力端子と、オフ信
号を入力するオフ信号入力端子と、オン・オフの制御信
号を制御対象回路に出力する制御信号出力端子と、前記
制御信号によジオン・オフされる制御対象回路がオンさ
れたことを示す信号を入力する制御確認信号端子を設け
、前記制御確認信号端子に制御対象回路がオンされたこ
とを示す信号が入力されている時だけ前記制御信号出力
端子から制御対象回路にオフ信号を出力することができ
、前記オン信号入力端子の入力電圧レベルの遷移が発生
すると前記制御信号出力端子にオン信号を出力し、前記
オフ信号入力端子の入力電圧レベルの遷移が発生すると
前記制御信号出力端子にオフ信号を出力するスイッチ制
御回路である。
Means for Solving the Problems The present invention turns on and off by turning on and off a switch.
An on signal input terminal that inputs an on signal to the electronic switch control circuit that generates and outputs an off control signal, an off signal input terminal that inputs an off signal, and outputs an on/off control signal to the controlled circuit. and a control confirmation signal terminal for inputting a signal indicating that the circuit to be controlled which is to be turned on or off by the control signal is turned on, and An off signal can be output from the control signal output terminal to the controlled circuit only when a signal indicating that the control signal is input is input, and when a transition in the input voltage level of the on signal input terminal occurs, the control signal output terminal The switch control circuit outputs an on signal to the control signal output terminal, and outputs an off signal to the control signal output terminal when a transition in the input voltage level of the off signal input terminal occurs.

作  用 以上のように構成し、制御対象回路がオンされたことを
示す制御確認信号を用いて制御対象回路の電源が完全に
立ち上がっている時のみオフ信号を制御信号できるよう
な制御を行なうことにより、制御対象回路のパワーオン
リセットが確実に動作するような電子式スイッチの制御
回路を実用できる。
Function: With the above configuration, a control confirmation signal indicating that the controlled circuit has been turned on is used to perform control such that the off signal can be sent only when the power to the controlled circuit is fully powered up. As a result, it is possible to put into practical use a control circuit for an electronic switch that can reliably perform a power-on reset of a controlled circuit.

実施例 以下本発明の実施例について説明する。第1図の7で示
される点線の内部は本発明のスイッチ制御回路の一実施
例を示す回路図である。また第2図に第1図の回路の動
作と制御対象回路の電源電圧の状態を表わすタイミング
図を示し、vDDは制御対象回路がオンされた時の電源
電圧を表わす。
Examples Examples of the present invention will be described below. The area inside the dotted line indicated by 7 in FIG. 1 is a circuit diagram showing one embodiment of the switch control circuit of the present invention. Further, FIG. 2 shows a timing chart showing the operation of the circuit shown in FIG. 1 and the state of the power supply voltage of the circuit to be controlled, where vDD represents the power supply voltage when the circuit to be controlled is turned on.

第1図において、1はオン信号入力端子、2はオフ信号
入力端子、3は制御信号出力端子、4はリセット信号入
力端子、6とeはDフリップフロップである。
In FIG. 1, 1 is an ON signal input terminal, 2 is an OFF signal input terminal, 3 is a control signal output terminal, 4 is a reset signal input terminal, and 6 and e are D flip-flops.

オン信号入力端子1において電圧レベルがローレベルか
らハイレベルに遷移すると制御信号出力端子3にハイレ
ベルが出力され、制御対象回路がオンされる。これによ
り制御確認信号端子4に制御対象回路がオンされたこと
を示すハイレベルの信号が入力され、これ以降、制御確
認信号端子4にオフ信号の出力力が可能となる。またオ
フ信号入力端子2において電圧レベルがローレベルから
ハイレベルに遷移するとeのDフリップフロップ出力に
ローレベルが出力され、6のDフリップフロップのクリ
ア端子に入力されるので出力制御信号出力端子3にはロ
ーレベルが出力され、制御対象回路はオフされる。第2
図に示すように、制御確認信号端子4に制御対象回路の
電源電圧がvDDになりオンされたことを示す・・イレ
ペルの信号が入力される以前においては、オフ信号入力
端子2ニオイテ電圧レベルがローレベルからハイレベル
に遷移しても出力制御信号出力端子3にはローレベルが
出力できない。
When the voltage level at the ON signal input terminal 1 changes from low level to high level, a high level is output to the control signal output terminal 3, and the controlled circuit is turned on. As a result, a high-level signal indicating that the circuit to be controlled is turned on is input to the control confirmation signal terminal 4, and from this point on, it becomes possible to output an OFF signal to the control confirmation signal terminal 4. Furthermore, when the voltage level changes from low level to high level at the off signal input terminal 2, a low level is output to the D flip-flop output of e, and is input to the clear terminal of the D flip-flop of 6, so the output control signal output terminal 3 A low level is output, and the controlled circuit is turned off. Second
As shown in the figure, the power supply voltage of the controlled circuit becomes vDD at the control confirmation signal terminal 4, indicating that it is turned on. Even if the signal changes from low level to high level, the low level cannot be output to the output control signal output terminal 3.

発明の効果 以上に述べてきたように、本発明によれば、極めて簡易
な回路構成で、制御対象回路のパワーオンリセットが確
実に動作するような電子式スイッチの制御回路を実現で
き、実用的に極めて有用である。
Effects of the Invention As described above, according to the present invention, it is possible to realize a control circuit for an electronic switch that reliably operates the power-on reset of the controlled circuit with an extremely simple circuit configuration, and is practical. extremely useful.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例におけるスイッチ制御回路の
回路図、第2図は第1図の動作を表わすタイミング図、
第3図は従来のスイッチ制御回路の回路図、第4図は第
3図の動作を表わすタイミング図である。 1・・・・・・オン信号入力端子、2・・・・・・オフ
信号入力端子、3・・・・・・制御信号出力端子、4・
・・・・・リセット信号入力端子、5・・・・・・Dフ
リップフロップ、6・・・・・・Dフリップフロップ。 代理人の氏名 弁理士 中 尾 敏 男 ほか1名第1
図 第 2 図 w&3  図               lす第 
4 図 ’ TR3
FIG. 1 is a circuit diagram of a switch control circuit in an embodiment of the present invention, FIG. 2 is a timing diagram showing the operation of FIG. 1,
FIG. 3 is a circuit diagram of a conventional switch control circuit, and FIG. 4 is a timing diagram showing the operation of FIG. 3. 1...On signal input terminal, 2...Off signal input terminal, 3...Control signal output terminal, 4...
...Reset signal input terminal, 5...D flip-flop, 6...D flip-flop. Name of agent: Patent attorney Toshio Nakao and 1 other person No. 1
Figure 2 Figure w & 3 Figure l
4 Figure 'TR3

Claims (1)

【特許請求の範囲】[Claims] スイッチをオン・オフすることにより、オン・オフの制
御信号を発生・出力する電子式スイッチの制御回路にオ
ン信号を入力するオン信号入力端子と、オフ信号を入力
するオフ信号入力端子と、オン・オフの制御信号を制御
対象回路に出力する制御信号出力端子と、前記制御信号
によりオン・オフされる制御対象回路がオンされたこと
を示す信号を入力する制御確認信号端子を設け、前記制
御確認信号端子に制御対象回路がオンされたことを示す
信号が入力されている時だけ前記制御信号出力端子から
制御対象回路にオフ信号を出力することができ、前記オ
ン信号入力端子の入力電圧レベルの遷移が発生すると前
記制御信号出力端子にオン信号を出力し、前記オフ信号
入力端子の入力電圧レベルの遷移が発生すると前記制御
信号出力端子にオフ信号を出力するスイッチ制御回路。
An on signal input terminal inputs an on signal to the control circuit of an electronic switch that generates and outputs an on/off control signal by turning the switch on and off; an off signal input terminal inputs an off signal; - A control signal output terminal that outputs an OFF control signal to the controlled circuit and a control confirmation signal terminal that inputs a signal indicating that the controlled circuit that is turned on and off by the control signal is turned on, and Only when a signal indicating that the controlled circuit is turned on is input to the confirmation signal terminal, an off signal can be output from the control signal output terminal to the controlled circuit, and the input voltage level of the on signal input terminal A switch control circuit that outputs an on signal to the control signal output terminal when a transition occurs, and outputs an off signal to the control signal output terminal when a transition occurs in the input voltage level of the off signal input terminal.
JP21439186A 1986-09-11 1986-09-11 Switch control circuit Pending JPS6369317A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP21439186A JPS6369317A (en) 1986-09-11 1986-09-11 Switch control circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP21439186A JPS6369317A (en) 1986-09-11 1986-09-11 Switch control circuit

Publications (1)

Publication Number Publication Date
JPS6369317A true JPS6369317A (en) 1988-03-29

Family

ID=16655011

Family Applications (1)

Application Number Title Priority Date Filing Date
JP21439186A Pending JPS6369317A (en) 1986-09-11 1986-09-11 Switch control circuit

Country Status (1)

Country Link
JP (1) JPS6369317A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2022236119A1 (en) 2021-05-06 2022-11-10 Lung Biotechnology Pbc Microphysiological 3-d printing and its applications

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2022236119A1 (en) 2021-05-06 2022-11-10 Lung Biotechnology Pbc Microphysiological 3-d printing and its applications

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