JPS6364145U - - Google Patents

Info

Publication number
JPS6364145U
JPS6364145U JP13560086U JP13560086U JPS6364145U JP S6364145 U JPS6364145 U JP S6364145U JP 13560086 U JP13560086 U JP 13560086U JP 13560086 U JP13560086 U JP 13560086U JP S6364145 U JPS6364145 U JP S6364145U
Authority
JP
Japan
Prior art keywords
data communication
counting
transmission
receiving means
transmitting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP13560086U
Other languages
Japanese (ja)
Other versions
JPH0510437Y2 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1986135600U priority Critical patent/JPH0510437Y2/ja
Publication of JPS6364145U publication Critical patent/JPS6364145U/ja
Application granted granted Critical
Publication of JPH0510437Y2 publication Critical patent/JPH0510437Y2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Communication Control (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は本考案の機能ブロツク図、第２図ない
し第４図は第１実施例を示し、第２図は要部の回
路構成図、第３図はフローチヤート、第４図はタ
イムチヤート、第５図および第６図は第２実施例
を示し、第５図は要部の回路構成図、第６図はＲ
ＡＭ２６の具体的構成図である。 １１……ＣＰＵ、１２……通信ＬＳＩ、１５…
…アドレスデコーダ、１６……ラツチ、２４……
クロツクジエネレータ、２６Ａ……通信用バツフ
ア、２６Ｂ……ＦＤＤ。 Fig. 1 is a functional block diagram of the present invention, Figs. 2 to 4 show the first embodiment, Fig. 2 is a circuit diagram of the main part, Fig. 3 is a flow chart, and Fig. 4 is a time chart. , FIG. 5 and FIG. 6 show the second embodiment, FIG. 5 is a circuit diagram of the main part, and FIG.
It is a concrete block diagram of AM26. 11...CPU, 12...Communication LSI, 15...
...Address decoder, 16...Latch, 24...
Clock generator, 26A...Communication buffer, 26B...FDD.

Claims (1)

【実用新案登録請求の範囲】 送信手段と、 この送信手段との間でデータ通信が行なわれる
受信手段と、 送信データの送信一時休止状態の発生をカウン
トするカウント手段と、 このカウント手段のカウント結果に応じて上記
データ通信の送信スピードを可変制御するかもし
くは前記受信手段のバツフアの容量を可変制御す
る制御手段と、 を備えてなるデータ通信装置。[Scope of Claim for Utility Model Registration] A transmitting means, a receiving means for performing data communication with the transmitting means, a counting means for counting the occurrence of a temporary pause state in the transmission of transmitted data, and a count result of the counting means A data communication device comprising: control means for variably controlling the transmission speed of the data communication or the buffer capacity of the receiving means in accordance with the data communication.
JP1986135600U 1986-09-05 1986-09-05 Expired - Lifetime JPH0510437Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1986135600U JPH0510437Y2 (en) 1986-09-05 1986-09-05

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1986135600U JPH0510437Y2 (en) 1986-09-05 1986-09-05

Publications (2)

Publication Number Publication Date
JPS6364145U true JPS6364145U (en) 1988-04-27
JPH0510437Y2 JPH0510437Y2 (en) 1993-03-15

Family

ID=31037937

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1986135600U Expired - Lifetime JPH0510437Y2 (en) 1986-09-05 1986-09-05

Country Status (1)

Country Link
JP (1) JPH0510437Y2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010218063A (en) * 2009-03-13 2010-09-30 Ricoh Co Ltd Data transmitter, information processor, and operating frequency control method

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56136057A (en) * 1980-03-04 1981-10-23 Western Electric Co Adaptive memory
JPS60171849A (en) * 1984-02-17 1985-09-05 Hitachi Ltd Data low control system
JPS6163141A (en) * 1984-09-04 1986-04-01 Nippon Telegr & Teleph Corp <Ntt> Communication control system
JPS6173456A (en) * 1984-09-19 1986-04-15 Hitachi Ltd Information transmission/reception system

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56136057A (en) * 1980-03-04 1981-10-23 Western Electric Co Adaptive memory
JPS60171849A (en) * 1984-02-17 1985-09-05 Hitachi Ltd Data low control system
JPS6163141A (en) * 1984-09-04 1986-04-01 Nippon Telegr & Teleph Corp <Ntt> Communication control system
JPS6173456A (en) * 1984-09-19 1986-04-15 Hitachi Ltd Information transmission/reception system

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010218063A (en) * 2009-03-13 2010-09-30 Ricoh Co Ltd Data transmitter, information processor, and operating frequency control method

Also Published As

Publication number Publication date
JPH0510437Y2 (en) 1993-03-15

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