JPS6364092B2 - - Google Patents

Description

[Detailed description of the invention]

This invention relates to a communication device having a multiple frequency conversion configuration, particularly
The purpose is to prevent cross spurious beats that occur in circuits that include PLL oscillators. Almost all modern communication devices are of the superheterodyne type, often using double or more multiplex conversion, and each converter (hereinafter referred to as a mixer) is equipped with a local oscillator that injects a local frequency. For variable oscillators, PLL (Phase Locked Loop) control is often used for frequency setting accuracy and stability. However, PLL circuits have spurious beats that occur due to internal frequency relationships, which can interfere with reception at certain frequencies, so first we need to understand the mechanism of its occurrence and the important factors for the establishment of the present invention. Let me explain about a certain drift cancel circuit. FIG. 1 shows an example of the configuration of a double conversion superheterodyne receiving circuit, in which the input signal wave from the antenna 1 becomes the first intermediate frequency at the front-stage mixer 2, passes through the pan-do-pass filter 3, and then reaches the second intermediate frequency at the rear-stage mixer 4. It becomes an intermediate frequency, and is amplified and demodulated through a bandpass filter 5. The local oscillation frequency _L1 of the pre-stage mixer 2 is injected from the PLL controlled oscillation circuit 6 . The PLL oscillation circuit 6 uses a voltage controlled oscillator (hereinafter referred to as VCO) to generate a fundamental wave oscillation, and supplies its output to the mixer 2 as well as the internal mixer 62.
It mixes it with the frequency of fixed oscillator 7 and outputs _n . In FIG. 1, the frequency of the oscillator 7 is injected into the mixer 62, and the local oscillation frequency of the mixer 4 in the subsequent stage is
It is used as _L2 , and the oscillator 7 serves as a shared oscillator for the front-stage mixer and the rear-stage mixer. This configuration not only saves one oscillator by sharing the oscillator 7, but even if the oscillation frequency of the shared oscillator 7 changes somewhat, the injection frequency _L1
The change in the first intermediate frequency due to the fluctuation of is canceled out by the fluctuation of the injection frequency _L2 of the rear mixer,
This method can be made so that the intermediate frequency is not affected at all, and its principle is well known as the drift cancel method, so it will not be described in detail, but it is one of the important components of the present invention. . The output frequency of the mixer 62 is passed through a frequency divider 63, and a phase comparator 64 compares the phase with the reference frequency _R. A positive or negative detection voltage generated according to the phase difference is passed through a low-pass filter 65 as a DC control voltage.
In addition to the VCO 61, it constitutes a control loop that stabilizes the oscillation frequency, but since the oscillation frequency _L1 basically changes in steps of the reference frequency _R , it is very small compared to _L1 .
Naturally, the frequency divider output frequency whose phase should be compared with _R will also be a small value. On the other hand, there is a problem that the larger the frequency divider ratio is, the lower the control loop gain and the lower the stability of the PLL loop.
Since it is desirable that the output _n of the mixer 62 has a frequency as low as possible, and because of the constraints imposed by the operable frequency of the frequency divider, the mixer 62 is normally used as a down mixer and _n is set to be smaller than _L1 .
The cross spurious beat of the PLL circuit is
This is most noticeable when the frequencies of _n and _L1 are an integer ratio, so the mechanism of its occurrence will be explained below. 62 is a down mixer, so if the above integer ratio is n and _L1 > _L2 , then _n = _L1 - _L2 , and the mixer output includes _L1 , _L2 , and _L1 in addition to _n .
+ _L2 and other frequencies are included, but since these are much higher frequencies than _n , they can be easily removed by a low-pass filter or band-pass filter at the mixer output section, and only _n can be extracted. However, in reality, harmonics of the above frequency are generated due to the nonlinearity of the mixer. This harmonic itself has a higher frequency, so there is no problem, but in the frequency state of n _n = _L1 , the nth harmonic of output _n has the same frequency as _L1 , causing interference. This becomes a zero beat and does not appear externally, but when the input frequency changes by Δ, the change in the fundamental wave output is Δ, and the change in the nth harmonic output is nΔ. Therefore, n _n →n _n ±nΔ= _L1 ±nΔ If we take the difference between this and the input _L1 ±Δ, ( _L1 ±nΔ) − ( _L1 ±Δ) = ±(n−1)Δ From this formula, we get・It can be seen that in the mixer, before and after the frequency where the input frequency is n times the output frequency, a beat frequency that is (n-1) times the difference frequency with the input frequency is generated at the output, and the frequency changes around the zero beat. Since the beats change in a crossing manner, they are generally called cross spurious beats. This beat passes through a frequency divider with _n or modulates _n and is mixed into the output of phase comparator 64, and when it is below the cutoff frequency of filter 65, it is added to VCO 61 and output _L1
is frequency modulated and becomes a spurious component. If the cut-off frequency of this filter 65 is set low, the time constant increases and the lock-up time (the time it takes for the oscillation frequency to stabilize) of the PLL oscillator becomes longer, which is a limitation in practical circuits.
There are also spurious emissions caused by the high frequency and nonlinearity of the reference frequency and phase comparator, but since they are all limited to specific frequencies, it is desirable to design to avoid frequency relationships that generate spurious. - Impossible for coverage purposes. The actual situation will be explained using the practical circuit example shown in FIG. The difference between this circuit and the configuration shown in Figure 1 is that the PLL
Circuit 6 is responsible only for large frequency steps (500KHz in this case) for setting the reception band.
Fine frequency adjustments such as tuning operations are performed by another oscillator circuit (not shown in the figure, but usually configured with a PLL oscillator circuit), and the frequency is matched with the frequency of the local oscillator 7 of the mixer 4 in the rear stage and the mixer 8. The purpose is achieved by mixing the signals in the PLL circuit 6 and injecting them into the mixer 62 in the PLL circuit 6. 1 and 2, only a mixer 8 is added in terms of configuration, and the drift cancel operation described with respect to FIG. 1 is also applied to FIG. 2. (Proof omitted) The frequency configuration is the first intermediate frequency 47055kHz, the second
Intermediate frequency is 10700kHz, reception frequency is 0~
General coverage of 30000kHz is possible.
The frequencies below are also shown in kHz to avoid confusion. The local oscillation frequency _L1 of the front-stage mixer 2 is the sum of the receiving frequency and the intermediate frequency, and is 47055~
77055kHz, and the reference frequency of PLL 6 is 500kHz
Therefore, the bandwidth is also 500kHz. The reason why this bandwidth is set to kHz is because it is convenient for amateur bands. Rear mixer 4
The local oscillation frequency _L2 is 36355kHz, and the second
is mixed with the oscillation frequency of 8,700 to 9,200 kHz by the mixer 8, and the sum of _L4 having a frequency of 45,055 to 45,555 kHz is injected into the mixer 62 in the PLL 6 . The frequency division ratio of the frequency divider 63 is N = 4 to 64, and the comparison frequency on the output side is 500kHz.
Therefore, when the input of the frequency divider (which is also the output of the mixer 62) _n = 500kHz x N, and _n = _L1 as explained in FIG. 1, a cross spurious beat occurs. However, this spurious does not occur in all bands, but in the case of the above frequency relationship, _n is 3500kHz and 14 times that is
A beat is generated around the receiving frequency of 1945kHz, which matches _L1 's 49000kHz. Reception frequency at that time

[Table] Table 1 shows in detail the relationship between the local oscillation frequency _L1 and the 14th harmonic of _n (which is constant at 49000kHz) and the frequency of the generated cross spurious beat. This beat frequency is the interference harmonic
49000kHz is also the frequency generated by being added to the mixer together with the local oscillator _L1 and detected through the intermediate frequency stage. In order to prevent cross spurious beats occurring in this way, the present invention uses a first
The second PLL oscillator is used as the local oscillator of the mixer in the control loop of the PLL oscillator, and the first PLL
Set the frequency of the operating band with the oscillator, and
In a wireless receiver configured to set a lower digit frequency within a band with a PLL oscillator, a drift cancel circuit is configured by injecting the local oscillation frequency of a subsequent mixer into the control loop of the first PLL oscillator, and The second voltage controlled variable reactance element finely adjusts the local oscillation frequency.
The first local oscillation frequency _L1 that generates the cross spurious beat is set by applying a voltage obtained by D/A converting the output of an appropriate digit of the up-down counter that sets the frequency of the PLL oscillator.
is shifted within a range where spurious beats can be removed by a filter in the circuit. Since the first PLL oscillation circuit described above is almost the same as that shown in FIG. 2, the second PLL oscillation circuit 9 will be described below. In FIG. 3, the PLL circuit 9 has an oscillator (VCO-2) 91 (oscillation frequency
87000~92000kHz), programmable frequency divider 92
(N=700 to 1199), phase comparator 93 (reference frequency
_R2 consists of 10kHz) and a low-pass filter 94, and since the oscillation frequency of VCO-2 is very high,
The down mixer 95 lowers the frequency applied to the frequency divider 92 to 7,000 to 12,000 kHz.
The output of VCO-2 is 8700 ~ through a 1/10 frequency divider.
Mixer 8 as 9200kHz (symbols are the same as in Figure 2)
However, the purpose of increasing the oscillation frequency and passing it through a frequency divider is to shorten the lock-up time of the circuit by increasing the reference frequency as much as possible, and to divide the output. This has the effect of reducing spurious output generated within the circuit, but since it has no direct relation to the present invention, it will not be described in detail. The frequency is set by inputting data from a BCD up/down counter 10 that integrates clock pulses supplied from an encoder 11 to each digit of a frequency divider 92 . This is a commonly used frequency control method. In the present invention, the above-mentioned up/down counter 1
Appropriate digit of the data output of 0 (in Figure 3
The output of the D/A converter 12 (1kHz digit) is converted into a DC voltage change by a voltage-controlled variable reactance element (Fig. In addition to the voltage controlled variable capacitance diode) 72,
By changing the oscillation frequency, which was fixed at 36355kHz in Figure 2, between 36355 and 36365kHz, it is possible to avoid the cross spurious that occurs around the oscillation frequency of 1945kHz, as seen in Table 1. It is something. Table 2 summarizes this frequency relationship in an easy-to-understand manner. When the second local oscillation frequency _L2 is changed as shown in the second column in response to a change in the oscillation frequency in the first column, the first local oscillation frequency L2 is changed as shown in the second column. frequency
_L1 changes stepwise as shown in the third column, and the beat frequency of the cross spur changes as shown in the fourth column.
Since it does not go below 5kHz, it can be completely removed by using a narrowband filter. In this case, the first intermediate frequency is as shown in the fifth column.
Although it fluctuates in a width of 10 kHz, it is corrected by the principle of drift cancellation described earlier, so there is no operational problem as long as care is taken not to deviate from the band of the first intermediate frequency filter. In order to make the frequency relationship in Tables 1 and 2 easier to understand, FIG. 4 shows a direct graphical representation. Solid line A is for the case shown in Table 1, where the local oscillation frequency changes proportionally in response to the reception frequency on the horizontal axis, cross spurious beats occur around the zero beat of 1945kHz, and The frequency is
It can be seen that the frequency is constant at 47055kHz. Table 2 also shows the local oscillation frequency as indicated by the broken line B.

[Table] Since the number changes in steps of 10kHz to avoid 49000kHz, the beat frequency will be constant at 5kHz at the lowest. It appears that 1940kHz intersects with 49000kHz, but in reality it jumps from 48995 to 49005kHz, so no beat occurs. Also, since the intermediate frequency changes in a sawtooth pattern with a width of 10 kHz, it can be seen that it is even better if the center frequency of the filter is set to 47060 kHz. Table 2 shows changes in 1 kHz intervals, but in reality the changes can be made more minutely, so the shape is as shown in Figure 4. In Table 2 and Figure 4, it is assumed that the receiving frequency and the second local oscillation frequency _L2 change by the same amount, but this does not necessarily have to be the same amount of change, as indicated by the broken line in Figure 4. Since the linear change is only slightly curved and does not pose a practical problem, there is no need to worry about it becoming a production bottleneck.

[Brief explanation of drawings]

Figure 1 is an example of a block circuit diagram of a double conversion receiver with a PLL-controlled local oscillator circuit.
2 and 3 are block diagrams of circuits implementing the present invention,
FIG. 4 is a graph directly displaying the frequency operation relationship of the circuit of the present invention. 1...Antenna, 2...Pre-stage mixer, 3, 5...
...Bandpass filter, 4...Late stage mixer,
6, 9 ...PLL oscillation circuit, 61,91...VCO,
62, 95...internal mixer, 63, 92 ...programmable frequency divider, 64,93...phase comparator,
65, 94...Low pass filter, 7...Second
Local oscillator, 71... Oscillation crystal piece, 72... Variable capacitance diode, 8... Mixer, 10... BCD
Up/down counter, 11...Encoder, 12...D/A converter, _L1 , _L2 , _L3 , _L4
...Local oscillation frequency, _R1 , _R2 ...Reference frequency.

Claims (1)

[Claims] 1 The first oscillator constituting the local oscillator of the pre-stage mixer
The second PLL oscillator is used as the local oscillator of the mixer in the control loop of the PLL oscillator, and the first PLL
Set the frequency of the operating band with the oscillator, and
In a wireless receiver configured to set a lower digit frequency within a band with a PLL oscillator, a drift cancel circuit is configured by injecting the local oscillation frequency of a subsequent mixer into the control loop of the first PLL oscillator, and The second voltage controlled variable reactance element finely adjusts the local oscillation frequency.
The cross spurious generated in the PLL oscillator is removed by applying a voltage obtained by D/A converting the output of an appropriate digit of the up/down counter that sets the frequency of the PLL oscillator. Radio receiver with cross spurious removed.