JPS6361342A - Integrated circuit for control - Google Patents

Abstract

PURPOSE:To take out a trigger signal effective to a trouble processing at the time of a trouble and an analyzing at the time of a development evaluation to the outside of an integrated circuit for control by adding a small quantity of hardware (selecting circuit) to the integrated circuit for the control. CONSTITUTION:A selecting circuit 6 selects applicable one of the outputs of error detecting circuits 2-5 based on a control signal for selecting from input terminals 7 and 8 of an integrated circuit 1 for control. An output terminal 9 is the terminal of the integrated circuit for control of the selecting output signal of the selecting circuit 6. Buffer gates 10-12 are respectively arranged onto the base mounting the integrated circuit 1 for the control. Input terminals 13 and 14 supply a control signal for selection control to buffer gates 10 and 11 and an output terminal 15 outputs a selecting signal supplied from the buffer gate 12.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a control integrated circuit used in an information processing device and the like, and particularly to a control integrated circuit that can extract an error signal as an effective trigger signal.

[Conventional technology]

Conventionally, in information processing devices, D r P (Dual Inline
It has been common practice to mount a number of small-scale integrated circuits mounted on a board on a substrate to configure a central processing unit, a storage device, and a peripheral control device. Therefore, since the error detection circuit is composed of a small-scale integrated circuit that is separate from the storage device that is the target of error detection, when the error detection circuit detects various errors, the error signal is transmitted to the error detection circuit. It is output outside the small-scale integrated circuit such as the target storage device. Therefore, it is relatively easy to obtain the error signal as a trigger signal for analysis using a logic tracer or the like.

[Problem that the invention seeks to solve]

In recent years, as device technology has progressed, large-scale integrated circuits have come into practical use, and processors in small devices are now all housed on one chip.

The storage devices used in information processing devices are no exception, and as memory elements become more highly integrated, they are becoming more and more integrated into single chips, and control sections are also becoming more integrated into one chip due to large-scale integrated circuits. In that case, since most of the control parts are built into one integrated circuit (within one chip) (the error detection circuit is also built into the same chip), interface errors can occur. Errors in read data detected within the α device will not be output to the outside of the control integrated circuit (chip) as is. Furthermore, even if the error signal is outputted outside the control integrated circuit in the form of a memory error signal, the signal may be outputted without passing through the flip-flop resulting from the error detection circuit.

In that case, uncertain data will be output. Furthermore, there are cases where the error signal is valid only when it is synchronized with the reply signal, and there are cases where the error output signal simply cannot be used. In these cases, especially at the development stage, it is expected that various errors will be detected during connection tests with the processor, in which case the error signal will be used as a trigger to analyze the problem.

Therefore, in any case, there is a drawback that unless the error signal is outputted outside the control integrated circuit, a trigger signal for analysis by a logic tracer or the like cannot be obtained.

Therefore, the present invention provides a control integrated circuit in which an error signal can be taken out of the control integrated circuit as an effective trigger signal for troubleshooting (trouble processing) at the time of failure and analysis during development evaluation. Our goal is to provide the following.

[Means for solving problems]

The control integrated circuit of the present invention includes a plurality of error detection circuits for detecting different types of errors, and a plurality of error detection circuits based on a control signal constituted by input signals from a plurality of input terminals. A selection circuit is provided for selecting the output of the corresponding error detection circuit from among the outputs of the error detection circuit and outputting the selected output to the output terminal.

〔Example〕

Next, the present invention will be explained below with reference to the drawings.

FIG. 1 shows an embodiment of a control integrated circuit according to the present invention. Error detection circuits 2 to 5 are arranged within a control integrated circuit 1 for controlling a storage device. The error detection circuits 2 to 5 detect different types of errors, respectively.

Generally, there are various types of errors, such as address parity errors, write data parity errors, command parity errors, and read data errors. Here, for convenience, the types of errors will be referred to as A errors to D errors, and the error detection circuit 2 will also be referred to as an A error detection circuit for detecting an A error.

Similarly, the error detection circuit 3 will also be referred to as a B error detection circuit, the error detection circuit 4 as a C error detection circuit, and the error detection circuit 5 as a D error detection circuit. The selection circuit 6 is a circuit for selecting a corresponding one of the outputs of the error detection circuits 2 to 5 based on a selection control signal from the input terminal 7.8 of the control integrated circuit 1. The output terminal 9 is a terminal of an integrated circuit for controlling the selection output signal of the selection circuit 6.

Each of the buffer gates 10 to 12 is a control integrated circuit 1.
It is placed on a board equipped with. Input terminal 13.1
Reference numeral 4 is for supplying a selection control signal to the buffer gates 10 and 12, and an output terminal 15 is adapted to output a selection output signal supplied from the buffer gate 12.

Now, the selection circuit 6 can select one of the four error detection circuits 2 to 5 as follows according to the logical values input to the selection control signal input terminals 7 and 8 in the control integrated circuit 1. do it like this.

That is, when input terminals 7 and 8 are logic "0", "0", "1", "0", "0", "1", and "1", "1", respectively. , the output of the A error detection circuit 2, the output of the B error detection circuit 3, the output of the C error detection circuit, and the output of the D error detection circuit 5 are selected, respectively.

Regarding the setting of logical values of input terminals 7 and 8,
By clamping (fixing) input terminals 13 and 14 to logic "0" or "1", input terminals 7 and 8 can be set to the required logic value (logic for selecting the error detection circuit that is detecting the error that has occurred). value).

Furthermore, each of the error detection circuits 2 to 5 has a flip-flop, and a value determined as a result of error detection is set in the flip-flop and then outputted. Therefore, the selection output signal is output to the output terminal 15 on the board only when an error occurs.

Next, when an error occurs during inspection or the like in a device using the present control integrated circuit 1 having such a configuration, the error that has occurred is detected by the corresponding circuit among the error detection circuits 2 to 5. The output is sent to the selection circuit 6. Therefore, select the error detection circuit that you want to select, that is, the setting value (logical value) that corresponds to the type of error that you want to extract.
When set to the input terminal 7.8, the selection control signal determined by the setting value of the input terminal 7.8 causes the selection circuit 6 to select an error detection circuit (one of error detection circuits 2 to 5) corresponding to the selected value. Select the output of

At this time, if the selected error detection circuit detects the error that has occurred, the selection circuit 6 sends the selection output signal to the output terminal 9 and the output terminal 15 of the board via the buffer gate 12.
This will result in more output.

Further, if the selected error detection circuit does not detect the error that has occurred, the selection circuit 6 does not send out the selection output signal because the error that has occurred has not been detected. In this case, by clamping the input terminals 13 and 14 of the board to logic "0" or "1" and setting a selection control signal for selecting another error detection circuit, the type of error that has occurred can be determined. Even if the error is not known, a corresponding error detection circuit that detects the error that has occurred can be selected, and a necessary error signal can be taken out from the control integrated circuit 1 as a selection output signal.

As can be seen from the above, in the control integrated circuit 1, only the selection circuit 6 is added in addition to the error detection circuits 2 to 5, so an extremely small amount of hardware is required to be added. When an error occurs in a device (for example, an information processing device) using the control integrated circuit l, the error signal is transmitted to
It can be taken out from the control integrated circuit I as an effective trigger signal for troubleshooting (trouble processing) in the event of a failure or analysis during development evaluation, making it possible to improve efficiency compared to the conventional method.

The present invention is not limited to the embodiments described above, and various applications and modifications are possible. For example, in the embodiment, four error detection circuits 2 to 5 are provided, but if the number of types of errors to be detected changes, the number of error detection circuits provided may also be changed accordingly. Not even. In this case, the number of input terminals for the selection control signal of the control integrated circuit 1 is also changed as appropriate depending on the number of error detection circuits. In line with this, other configurations will also be
Modified as shown.

〔Effect of the invention〕

As explained above, according to the present invention, by adding a very small amount of hardware (selection circuit) to the control integrated circuit, an effective tool for troubleshooting failures or analysis during development evaluation can be created. One signal can be taken out of the control integrated circuit, making it possible to significantly improve efficiency compared to the conventional method.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of a control integrated circuit according to the present invention. 1...Control integrated circuit, 2-5...Error detection circuit, 6...Selection circuit, 7.8...Input of control integrated circuit Terminal, 9...
...Output terminals of the control integrated circuit, 10 to 12...
... Buffer gate, 13.14 ... Input terminal on the board, 15 ... Output terminal on the board. Applicant: NEC Corporation Representative

Claims (1)

[Claims] Based on a control integrated circuit used in information processing equipment, etc., the control integrated circuit consists of multiple error detection circuits for detecting different types of errors, and input signals from multiple input terminals. A control integrated circuit characterized in that a selection circuit is provided for selecting the output of a corresponding error detection circuit from among the outputs of the plurality of error detection circuits and outputting the selected output to an output terminal.