JPS6361344A - Integrated circuit for control - Google Patents

Abstract

PURPOSE:To take out a trigger signal effective to a trouble processing at the time of a trouble processing or analyzing at the time of evacluating development to the outside of an integrated circuit for control by adding a small quantity of hardware (error selecting circuit) to the integrated circuit for the control. CONSTITUTION:An error selecting circuit 7 selects one of the outputs of error detecting circuits 2-5 based on a control signal from a register 6 for selecting an error. An input terminal 8 is a terminal for controlling the shifting input signal of the register 6 for selecting the error and an output terminal 9 is the terminal of an integrated circuit 1 for controlling the selecting output signal from the error selecting circuit 7. A base terminal 12 is arranged on the base to mount an integrated circuit 1 for controlling. The control signal for selecting an error inputted from the base terminal 12 is supplied through a buffer gate 10 to an input terminal 8. On the other hand, a selecting output signal outputted from the output terminal 9 is supplied to a base terminal 13.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a control integrated circuit used in information processing devices, etc., and particularly to a control integrated circuit that can extract an error signal as an effective trigger signal. Regarding.

[Conventional technology]

Conventionally, in information processing devices, DIP (Dual Inline) with about 14 or 20 pins is used.
It has been common practice to mount a number of small-scale integrated circuits mounted on a board on a substrate to configure a central processing unit, a storage device, and a peripheral control device. Therefore, since the error detection circuit is composed of a small-scale integrated circuit that is separate from the storage device that is the target of error detection, when the error detection circuit detects various errors, the error signal is transmitted to the error detection circuit. Since the error signal is output outside the small-scale integrated circuit such as the target storage device, it is relatively easy to obtain the error signal as a trigger signal for analysis by a logic tracer or the like.

[Problem that the invention seeks to solve]

In recent years, with advances in devices and technology, large-scale integrated circuits have come into practical use, and the processors of small devices are all housed on one chip. In this case, it is also necessary to include an error detection circuit on the same chip. It has become difficult to obtain an error signal as a trigger signal outside the chip unless it is specially designed.

Storage devices used in information processing devices are no exception; as memory elements become more expensive, they are becoming more and more integrated into single chips, and control sections are also becoming more integrated into single chips due to large-scale integrated circuits. In that case, most of the control parts are built into one integrated circuit (in one chip) (the error detection circuit is also built into the same chip), so errors in the interface, read data errors detected in the storage device, etc. Also, as it is, it will not be output outside the control integrated circuit (chip). Furthermore, even if the error signal is output outside the control integrated circuit in the form of a small number of memory error signals, the result of the error detection circuit may be output to the signal without going through a flip-flop. . In that case, uncertain data will be output. Furthermore, there are cases where the error signal is valid only when it is synchronized with the reply signal, and there are cases where the error output signal simply cannot be used.

In these cases, especially at the development stage, it is expected that various errors will be detected during connection tests with the processor, in which case the error signal will be used as a trigger to analyze the problem. Therefore, there is a drawback that unless the error signal is output outside the control integrated circuit, a trigger signal for analysis by a logic tracer or the like cannot be obtained.

Large-scale integrated circuits also use a large number of input/output terminals (
It is difficult to add a large number of new input/output terminals for trigger signal generation.

Therefore, the present invention provides a method for converting the determined error signal into 1. Control that can be taken out of the control integrated circuit as an effective trigger signal for troubleshooting failures and analysis during development evaluation, as well as minimizing the number of additional input/output terminals. The objective is to provide integrated circuits for

[Means for solving problems]

The control integrated circuit of the present invention includes a plurality of error detection circuits for detecting different types of errors, and sends out a plurality of selection control signals by shifting an input signal from one input terminal. and an error selection circuit for selecting the outputs of the plurality of error detection circuits and sending them to the output terminal based on a predetermined selection control signal from the error selection register. This is what happens.

〔Example〕

Next, the present invention will be explained below with reference to the drawings.

FIG. 1 shows an embodiment of a control integrated circuit according to the present invention. Error detection circuits 2 to 5 are arranged within a control integrated circuit 1 for controlling a storage device. The error detection circuits 2 to 5 detect different types of errors, respectively.

In general, there are various types of errors, such as address parity errors, write data parity errors, command parity errors, and read data errors. Here, for convenience, the types of errors will be referred to as A errors to D errors, and the error detection circuit 2 will also be referred to as an A error detection circuit for detecting A errors.

Similarly, the error detection circuit 3 will also be referred to as a B error detection circuit, the error detection circuit 4 as a C error detection circuit, and the error detection circuit 5 as a D error detection circuit. The error selection register 6 is a register for setting an error selection control signal by a shift operation, and the error selection circuit 7 selects the error detection circuit 2 based on the error selection control signal (parallel signal) from the error selection register 6. This is a circuit for selecting a corresponding output from among the outputs of 5 to 5. Input terminal 8
is a terminal on the integrated circuit 1 for controlling the shift input signal of the error selection register 6, and the output terminal 9 is a terminal on the integrated circuit 1 for controlling the selection output signal from the error selection circuit 7.

Board terminals 12 are arranged on the board. Board terminal 1
The error selection control signal input from 2 is supplied to input terminal 8 via buffer gate 10, which is also arranged on the substrate. On the other hand, the selection output signal output from the output terminal 9 is supplied to the substrate terminal 13 via the buffer gate 11.

In this control integrated circuit 1, the error selection circuit 7 selects the error selection circuit 7 according to the logical value shifted into the error selection register 6.
One of the four error detection circuits 2 to 5 can be selected as follows. In other words, when the value of the error selection register 6 is logic "0", "0", logic "1", "0"
”, logic “0”, “1” and logic “1”
, "1", the output of the A error detection circuit 2, the output of the B error detection circuit 3, the output of the C error detection circuit 4, and the output of the D error detection circuit 5 are selected, respectively.

Next, in a device using the present control integrated circuit 1 having such a configuration, when an error occurs during inspection or the like, the error that has occurred is detected by the corresponding circuit among the error detection circuits 2 to 5.

Each of the error selection circuits 2 to 5 has a flip-flop, and a value determined as a result of error detection is set in the flip-flop, and then the value is output. Therefore, the selection output signal is supplied to the board terminal 13 for the selection output signal only when an error occurs.

When you set a setting value corresponding to the error detection circuit you want to select, that is, the type of error you want to extract, in the error selection register 6, the error selection control signal causes the error selection circuit 7 to detect the error corresponding to the setting value. Select the output of the circuit (any one of error detection circuits 2 to 5). At this time, if the selected error detection circuit detects an error that has occurred, the error selection circuit 7 outputs a selection output signal from the substrate terminal 13 via the output terminal 9 and the buffer gate 11.

Further, if the selected error detection circuit does not detect the error that has occurred, the error selection circuit 7 does not send out the selection output signal because the error that has occurred has not been detected. In this case, logic “0” or “
1" to the error selection register 6 to set another error selection control signal, it is possible to select the corresponding error detection circuit that is detecting the error that has occurred. A necessary error signal can be extracted as an output signal.

As can be seen from the above, by adding the error selection register 6 and the error selection circuit 7 in addition to the error detection circuits 2 to 5, when an error occurs in an information processing device, etc., the error signal can be sent to the troubleshooting circuit in the event of a failure. Effective signals for troubleshooting (trouble processing) and analysis during development evaluation can be taken out of the control integrated circuit 1 as a single signal, making it possible to improve efficiency compared to the conventional method.

Further, as for input/output terminals, it is only necessary to add one input terminal 8 and one output terminal 9 to the control integrated circuit 1, and the number of input/output terminals to be added can be minimized.

The present invention is not limited to the embodiments described above, and various applications and modifications are possible. For example, in the embodiment, four error detection circuits 2 to 5 are provided, but if the number of types of errors to be detected changes, a corresponding number of error detection circuits may be provided. In this case, it goes without saying that the number of parallel outputs of the error selection register 6 changes as necessary.

〔Effect of the invention〕

As explained above, according to the present invention, by adding a very small amount of hardware (error selection register, error selection circuit) to the control integrated circuit, troubleshooting at the time of failure or analysis at the time of development evaluation is possible. One effective signal can be taken out from the control integrated circuit and provided, making it possible to significantly improve efficiency compared to the conventional method. Further, according to the present invention, only one input/output terminal is added, and the number of input/output terminals to be added can be minimized.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of a control integrated circuit according to the present invention. 1...Control integrated circuit, 2-5...Error detection circuit, 6...Error selection register, 7......
Error selection circuit, 8... Input terminal of control integrated circuit, 9...
...Output terminal of the control integrated circuit. Applicant: NEC Corporation Representative

Claims (1)

[Claims] In control integrated circuits used in information processing equipment, etc., there are multiple error detection circuits for detecting different types of errors, and for multiple selections by shifting input signals from one input terminal. An error selection register that can send a control signal; and a predetermined selection control signal from the error selection register to select the output of the corresponding error detection circuit from among the outputs of the plurality of error detection circuits. What is claimed is: 1. A control integrated circuit comprising: an error selection circuit for transmitting a signal to an output terminal;