JPS6359592B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a color signal reproducing circuit for a color television receiver, and is particularly suitable for a semiconductor integrated circuit for a color television receiver that uses both PAL and SECAM systems. The present invention provides a circuit with improved performance.

Color television broadcasting systems are divided into NTSC, PAL and PAL systems due to differences in video signal transmission methods.
It is broadly divided into SECAM methods, and each country uses one of these methods as the standard method. Therefore, if countries that use different systems are in close contact with each other, a receiver that can receive broadcast waves from these different systems will be required. The present invention relates to a color signal reproducing circuit for a PAL/SECAM color television receiver, which is one of such receivers.

In the PAL system, the color difference signal (B-Y) signal and (R-Y) signal are quadrature-phase modulated on the color subcarrier, and the phase of the (R-Y) signal is inverted every scanning line period. is being transmitted.

On the other hand, in the SECAM system, color difference signals (B-Y) and (R-Y) signals are transmitted line-sequentially as different frequency modulation signals for each scanning line.

Figure 1 shows a PAL/SECAM that receives and reproduces both of these two different color television signals.
1 is a block diagram showing one conventional example of a dual-purpose color television receiver; FIG.

The received carrier color signal is transferred to the carrier color signal input terminal 1.
, and is further applied to either the PAL carrier color signal processing circuit 2 or the SECAM carrier color signal processing circuit 3 according to the method selected by the system discrimination circuit 7, and is processed.
Separated into (B-Y) PAL carrier color signal 8, (R-Y) PAL carrier color signal 9 or (B-Y) SECAM carrier color signal 10, (R-Y) SECAM carrier color signal 11, and then sent to the next PAL carrier. It is applied to the carrier color signal demodulation circuit 4 or the SECAM carrier color signal demodulation circuit 5, and as a result of demodulation in each circuit, (B-Y)PAL
Color difference signal 12, (R-Y) PAL color difference signal 13 or (B-Y) SECAM color difference signal 14, (R-Y)
It is given to the next matrix circuit 6 as the SECAM color difference signal 15, where it receives the separately given Y signal 1.
As a result, red (R), green (G), and blue (B) color signals 17 are reproduced and outputted from the matrix circuit 6.

FIG. 2 shows one of the PAL carrier color signal processing circuits 2.
FIG. 2 is a block diagram showing the main parts of two conventional examples. The PAL carrier color signal 18 is applied to a one horizontal scanning period delay line 19 and an addition/subtraction circuit 2.
0 directly. This is given directly here.
PAL carrier color signal 18 and 1 horizontal scanning period delay line 1
The PAL carrier color signal 18' delayed in step 9 is added and subtracted and outputted as (B-Y) PAL carrier color signal 8 and (R-Y) PAL carrier color signal 9.

FIG. 3 is a block diagram showing the main parts of one conventional example of the SECAM carrier color signal processing circuit 3. As shown in FIG. The SECAM carrier color signal 21 is applied to a one horizontal scanning period delay line 22 and directly to a line sequential switching circuit 23. Here, the directly applied SECAM carrier color signal 21 and the SECAM carrier color signal 21' delayed by one horizontal scanning period delay line 22 are separately provided as a line sequential synchronization signal 2.
The result synthesized according to 4 is (B-Y)SECAM
A carrier color signal 10 and a (RY)SECAM carrier color signal 11 are output.

As mentioned above, the carrier color signal processing circuit of the conventional PAL/SECAM color television receiver is
A one horizontal scanning period delay line 19 is used for the PAL carrier color signal processing circuit 2, and a one horizontal scanning period delay line 22 is used for the SECAM carrier color signal processing circuit 3, respectively. These one horizontal scanning period delay lines 19 and 22 are naturally difficult to integrate into a semiconductor integrated circuit, and must be used as external components of the integrated circuit. This is a major problem for integrated circuits where the number of terminals on a package is limited, since four terminals are required for this purpose.

Furthermore, it is necessary to insert impedance matching resistors and phase adjustment coils into the input/output circuits of the one-horizontal scanning period delay lines 19 and 22 and adjust them individually, and the amount of adjustment steps cannot be ignored. Furthermore, since this delay line is relatively expensive as a component, it poses a problem in terms of reducing material costs (including the matching resistor and adjustment coil).

The purpose of the present invention is to solve such problems,
A PAL/SECAM dual-purpose color television receiver that is suitable for semiconductor integrated circuits and can be processed using only one one-horizontal scanning period delay line by providing an appropriate switching circuit between PAL carrier color signals and SECAM carrier color signals. The purpose is to provide a color reproduction circuit.

The color signal reproducing circuit of the present invention includes two color difference signals that are quadrature-phase modulated on a color subcarrier, and the phase of one of the color difference signals is inverted every scanning line period, and the first color signal is transmitted by inverting the phase of the color difference signal. television signal,
In a color television receiver that receives and reproduces both a second color television signal that is transmitted line-sequentially as two color difference signals as different frequency modulation signals for each scanning line, the first color television receiver a first carrier color signal processing circuit for processing a carrier color signal of the television signal; a second carrier color signal processing circuit for processing the carrier color signal of the second color television signal; and the first carrier color signal processing circuit. a carrier color signal switching circuit for switching and transmitting the output signal of the second carrier color signal processing circuit and the output signal of the second carrier color signal processing circuit;
A horizontal scanning period delay line performs addition and subtraction processing on the output signal of the first carrier color signal processing circuit and the output signal whose output signal is delayed by the one horizontal scanning period delay line, thereby producing a first carrier color signal. an addition/subtraction circuit for obtaining a second carrier color signal, and a line-sequential line sequence for obtaining a second carrier color signal by switching and combining the output signal of the second carrier color signal processing circuit and the output signal whose output signal is delayed by the one horizontal scanning period delay line. a switching circuit, a first carrier color signal demodulation circuit, a second carrier color signal demodulation circuit,
a matrix circuit; and a system discrimination circuit for discriminating between the first color television signal and the second color television signal and sending a switching signal to the carrier color signal switching circuit and the matrix circuit; The color signal is obtained from the matrix circuit by reproducing the carrier color signal of the first color television signal or the carrier color signal of the second color television signal.

An embodiment of the present invention will be described in detail below with reference to the drawings.

FIG. 4 is a block diagram showing one embodiment of a color signal reproducing circuit for a PAL/SECAM television receiver according to the present invention.

The carrier color signal applied to the carrier color signal input terminal 1 is sent to a first carrier color signal processing circuit 25 which processes a PAL carrier color signal which is a first color television signal.
and a second color television signal.
The second carrier color signal processing circuit 26 processes the SECAM carrier color signal, and the output of the processed result is passed through the first carrier color signal switching circuit 27.
corresponding to the switching signal 33 of the system discriminating circuit 7 which discriminates between the color television signal and the second color television signal and sends a switching signal.
It is sent as a PAL carrier color signal or a SECAM carrier color signal. If this output signal is a PAL carrier color signal, the PAL carrier color signal is
PAL is applied directly to the 1 horizontal scan period delay line 28 and delayed therein.
The carrier color signal is fed to the addition/subtraction circuit 29, where it is added to and subtracted from the PAL carrier color signal given on the above-mentioned straight line, and the (B-Y) PAL carrier color signal 8 and (R
-Y) A first carrier color signal demodulation circuit 31 that is output as a PAL carrier color signal 9 and demodulates the PAL carrier color signal.
The signal is demodulated and applied to the matrix circuit 6 as a (B-Y) PAL color difference signal 12 and a (R-Y) PAL color difference signal 13, where the result is combined with a separately provided Y signal 16, and the result is sent to the matrix circuit 6. are output as R, G, and B color signals 17. Furthermore, when the output signal from the carrier color signal switching circuit 27 is the SECAM carrier color signal, the SECAM
The carrier color signal is applied directly to the line sequential switching circuit 30, and also to the one horizontal period delay line 28, where the SECAM carrier color signal delayed is applied to the line sequential switching circuit 30, where the separately added line As a result of being combined with said directly applied SECAM carrier color signal in accordance with the sequential synchronization signal 24,
(B-Y) SECAM carrier color signal 10 and (R-Y)
Output as SECAM carrier color signal 11,
The second carrier color signal demodulation circuit 32 demodulates the SECAM carrier color signal, and the matrix circuit 6 outputs the signal as a color signal 17.

In the above circuit, for example, in the case of PAL carrier color signal processing, the line sequential switching circuit 30 and the second carrier color signal demodulation circuit 32 are in operation, but the line sequential switching circuit 30 and the second carrier color signal demodulating circuit 32 are in operation, but the line sequential switching circuit 30 and the second carrier color signal demodulating circuit 32 are in operation. The color difference signal given to the matrix circuit 6 by
Since it is switched to either PAL or SECAM, the output of the second carrier color signal demodulation circuit 32 is not given to the matrix circuit 6 during PAL, and only the output of the first carrier color signal demodulation circuit 31 is given to the matrix circuit 6. This will not affect PAL carrier color signal processing. Conversely
In the case of SECAM carrier color signal processing, only the output of the second carrier color signal demodulation circuit 32 is transmitted to the matrix circuit 6.
This does not affect the SECAM carrier color signal processing.

FIG. 5 is a partial circuit diagram showing a specific circuit mainly consisting of a carrier color signal switching circuit portion in one embodiment of the color signal reproducing circuit of the present invention. The part surrounded by the dashed line in the figure is the carrier color signal switching circuit 27, the upper part of the drawing is the PAL carrier color signal switching circuit 34, and the lower part of the drawing is the SECAM carrier color signal switching circuit 35.
36 and 37 are a PAL carrier color signal input terminal and a SECAM carrier color signal input terminal, respectively, and 48 is a system switching signal input terminal.

The output that is applied to the PAL carrier color signal input terminal 36 and processed by the first carrier color signal processing circuit 25 is
The SECAM carrier color signal is applied to the base of the input transistor 38 of the PAL carrier color signal switching circuit 34, while the SECAM carrier color signal is applied to the SECAM carrier color signal input terminal 37, and the output processed by the second carrier color signal processing circuit 26 is It is applied to the base of the input transistor 61 of the carrier color signal switching circuit 35. The carrier color signal output is the system switching signal input terminal 48.
In response to the system switching signal 33 from the system discrimination circuit 7 applied to the PAL carrier color signal, the signal is applied from the collector of the output transistor 49 of the PAL carrier color signal switching circuit 34 to the one horizontal scanning period delay line 28. It is also applied directly to the adder/subtracter circuit 29 via the emitter load resistor 53 of the output transistor 49 and the coupling capacitor 56.
On the other hand, in the case of the SECAM carrier color signal, it is applied from the collector of the output transistor 73 of the SECAM carrier color signal switching circuit 35 to the one horizontal scanning period delay line 28, and also via the emitter load resistor 76 of the output transistor 73 and the coupling capacitor 78. A direct line sequential switching circuit 30 is provided. In this way, the respective carrier color signals are combined by the adder/subtractor circuit 29 or the line sequential switching circuit 30 to form (B-Y) PAL carrier color signal 9 and (B-Y) SECAM carrier color signal 1.
0, (RY) SECAM carrier color signal 11 is obtained. The operation of this circuit will be explained in detail below.

First, the case of switching the circuit to the PAL system will be explained. A high level (for example, 1V) signal is input to the system switching signal input terminal 4 as the system switching signal 33.
8, this signal is applied through a resistor 47 to the base of a transistor 46 which performs a grounded-emitter operation, so that this transistor 46 becomes conductive and collector current flows through load resistors 44 and 45. As a result, in a parallel circuit of a transistor 41 and a transistor 42 in which the collector and emitter are connected in common, the collector is connected to Vcc, and the emitter is grounded through a load resistor 43 to perform a switching operation, the base potential of the transistor 42 is set to the collector current. Due to the voltage drop caused by the resistor 44, the potential becomes sufficiently lower than the base potential of the transistor 41. (The base potential of the transistor 41 is grounded via an emitter bias resistor 40, and is determined by the collector current of the input transistor 38, which is connected to the Vcc terminal via a load resistor 39 and has an emitter-grounded operation.) (Since it is determined by the voltage drop, the respective resistance values and collector current values are predefined so that the voltage drop due to the load resistor 44 is sufficiently larger than the voltage drop due to the load resistor 39.) As a result, the transistor 4
The transistor 41 operates as an emitter follower via the load resistor 43.

At this time, the PAL carrier color signal applied to the PAL carrier color signal input terminal 36 is subjected to processing such as amplification in the first carrier color signal processing circuit 25, and the output signal is given to the base of the input transistor 38.
Since the signal is further amplified by this transistor and applied to the base of transistor 41, the output signal is extracted from the emitter of transistor 41 and applied to the base of output transistor 49. The output transistor 49 performs grounded emitter amplification.
It is a PNP transistor, and its collector is connected to the one horizontal scanning period delay line 28, and its emitter is connected in series to a circuit in which a variable resistor 50 and a bypass capacitor 51 are connected in series, and a load resistor 52 and a load resistor 53 are connected in series. Vcc through a parallel circuit with the circuit
It is connected to one end of the addition/subtraction circuit 29 via a coupling capacitor 56 from the connection point between the load resistor 52 and the load resistor 53. Therefore, the output signal is applied from the collector of this transistor 49 to the one horizontal scanning period delay line 28 and directly from the emitter circuit to the addition/subtraction circuit 29. The reason why the variable resistor 50 and the load resistor are divided into two parts 52 and 53 is to adjust the magnitude of the output signal directly applied to the addition/subtraction circuit 29. The output signal delayed by the one-horizontal scanning period delay line 28 is applied to the midpoint of the transformer 57 constituting the adder/subtractor circuit 29 and one end thereof, while the output signal is directly output from the emitter circuit of the output transistor 49 to the midpoint of the transformer 57. Since the signal is given, output terminal 5
From output terminal 9, both signals are added to obtain (B-Y) PAL carrier color signal 8, and from output terminal 60, both signals are subtracted to obtain (R-Y) PAL carrier color signal 9.
Note that the resistors 54 and 58 are impedance matching resistors, and the coil 55 is for matching the phase of the carrier color signal applied to the addition/subtraction circuit 29.

On the other hand, the high level system switching signal 33 applied to the system switching signal input terminal 48 is connected to the resistor 72.
is applied to the base of a transistor 71 that performs an inversion operation through a load resistor 71. by the way
Since the PAL carrier color signal switching circuit 34 and the SECAM carrier color signal switching circuit 35 are designed in the same manner except for this inverting transistor 71, the following explanation will be limited to the route of circuit operation.

The high level system switching signal 33 is inverted by an inverting transistor 70 and transferred to a transistor 69.
Since the base of this transistor is pushed down to a low level, it is turned off.
As a result, the base potential of the transistor 65 that performs the switching operation becomes higher than the base potential of the transistor 64, so that the transistor 65 becomes conductive, and the transistor 64 becomes almost disconnected.
Therefore, the SECAM carrier color signal applied to the SECAM carrier color signal input terminal 37 is subjected to processing such as amplification in the second carrier color signal processing circuit 26, and its output signal is
The SECAM carrier color signal is applied to the base of the input transistor 61 of the SECAM carrier color signal switching circuit 35, is further amplified, and is applied to the base of the transistor 64, but as mentioned above, since the transistor 64 is in the off state, the SECAM carrier color signal is It will not be cut off and output. In this way, when the system switching signal 33 is at a high level, only the PAL carrier color signal component is output from the carrier color signal switching circuit 27.

Next, when switching the circuit to the SECAM system, as is already clear from the above explanation, the system switching signal 33 is set at a lower level (e.g.
0V) is applied to the system switching signal input terminal 48. Then, contrary to the previous case, the base of the transistor 69 becomes high potential due to the inversion transistor 70, and the transistor 69 becomes conductive, pushing down the base potential of the transistor 65, thereby turning off this transistor and making the transistor 64 conductive. As a result, the output signal of the SECAM carrier color signal is applied from the emitter of the transistor 64 operating as an emitter follower to the base of the output transistor 73, and the output signal is applied from the collector of the transistor 73 to the one horizontal scanning period delay line 28, and the output signal is applied from the emitter of the transistor 64 to the base of the output transistor 73. from the circuit via a coupling capacitor 78 directly to the line sequential switching circuit 30. On the other hand, by combining this directly applied output signal and the delayed output signal according to the line sequential synchronization signal 24 applied separately (B-
Y) SECAM carrier color signal 10 and (R-Y)
A SECAM carrier color signal 11 is obtained.

In this case, as is clear from the above description, the PAL carrier color signal is no longer cut off and output because the transistor 41 is turned off. In this way, when the system switching signal 33 is at a low level, the carrier color signal switching circuit 27
Only the SECAM carrier color signal will be output.

Although one example of the carrier color signal switching circuit 27 that can be easily implemented as a semiconductor integrated circuit has been described above, it goes without saying that the present invention is not limited to this circuit, and that various other circuits can also be used. Furthermore, the first carrier color signal processing circuit 2 whose details are not shown here.
5, second carrier color signal processing circuit 26, one horizontal scanning period delay line 28, addition/subtraction circuit 29, line sequential switching circuit 30, first carrier color signal demodulation circuit 31, second carrier color demodulation circuit 32, matrix circuit 6, and There are already many known examples of circuits such as the system discrimination circuit 7, and an appropriate one can be selected and used from among them.

As described in detail above, the color signal reproducing circuit of the present invention is applicable to an appropriate carrier color signal switching circuit in a color television receiver that receives and reproduces two color television signals of different transmission methods. By providing one horizontal scanning period delay line, it is possible to share the carrier color signal processing of both methods, so that only one delay line is required instead of two for each method in the past. . This not only saves relatively expensive parts and man-hours for installation and adjustment, but also means that there is one less component that cannot be integrated into a semiconductor integrated circuit and must be used as an external component. However, the present invention provides a color signal reproducing circuit which is easy to integrate into a semiconductor integrated circuit due to a reduction in the number of terminals, and the effect is extremely large.

[Brief explanation of the drawing]

Fig. 1 is a block diagram showing one conventional example of a color signal reproducing circuit for a PAL/SECAM dual-purpose color television receiver, and Fig. 2 is a block diagram showing the main parts of one conventional example of a PAL carrier color signal processing circuit. 3 is a block diagram showing the main parts of one conventional example of a SECAM carrier color signal processing circuit, FIG. 4 is a block diagram showing one embodiment of the color signal reproducing circuit of the present invention, and FIG. 1 is a partial circuit diagram showing a specific circuit mainly including a carrier color signal switching circuit portion in one embodiment of the color signal reproducing circuit of the present invention; FIG. In the figure, 1... Carrier color signal input terminal, 2... PAL carrier color signal processing circuit, 3... SECAM carrier color signal processing circuit, 4... PAL carrier color signal demodulation circuit, 5...
SECAM carrier color signal demodulation circuit, 6... Matrix circuit, 7... System discrimination circuit, 8... (B-
Y) PAL carrier color signal, 9...(R-Y) PAL carrier color signal, 10...(B-Y) SECAL carrier color signal, 11...(R-Y) SECAL carrier color signal, 1
2...(B-Y) PAL color difference signal, 13...(R
-Y) PAL color difference signal, 14...(B-Y)
SECAM color difference signal, 15...(RY)SECAM
Color difference signal, 16...Y signal, 17...Color signal, 1
8, 18'...PAL carrier color signal, 19, 22...
1 horizontal scanning period delay line, 20...addition/subtraction circuit, 2
1, 21'...SECAM carrier color signal, 23...Line sequential switching circuit, 24...Line sequential synchronization signal, 25...
...First carrier color signal processing circuit, 26...Second carrier color signal processing circuit, 27...Carrier color signal switching circuit, 2
8...1 horizontal scanning period delay line, 29...addition/subtraction circuit, 30...line sequential switching circuit, 31...first carrier color signal demodulation circuit, 32...second carrier color signal demodulation circuit, 33...system Switching signal, 34...PAL
Carrier color signal switching circuit, 35...SECAM carrier color signal switching circuit, 36...PAL carrier color signal input terminal,
37...SECAM carrier color signal input terminal, 48...
System switching signal input terminal, 38, 41, 42,
46, 49, 61, 64, 65, 69, 70, 7
3...Transistor, 39, 40, 43, 44,
45, 47, 52, 53, 54, 58, 62, 6
3, 66, 67, 68, 71, 72, 76, 77
...Resistance, 50,74...Variable resistance, 51,5
6, 75, 78... Capacitor, 55, 57...
Coil, 59, 60...output terminal.

Claims (1)

[Claims] 1 PAL color television signal and
a signal switching circuit that receives a SECAM color television signal and outputs one of these signals in response to a system switching signal; a delay line that delays the signal output from the signal switching circuit by one horizontal scanning period; The delayed signal from the delay line and the
an addition/subtraction circuit that receives the PAL color television signal and performs addition and subtraction processing to generate a PAL carrier color signal; and an adder/subtractor that receives the delayed signal from the delay line and the SECAM color television signal and performs switching and synthesis of these signals. Go SECAM
In a color signal reproducing circuit comprising a line sequential switching circuit that generates a carrier color signal, the signal switching circuit comprises:
a first transistor of a first conductivity type, which is an emitter grounded type, to which the PAL color television signal is applied to the base; and the first transistor, which is an emitter follower type, to which the collector output of the first transistor is applied to the base. a second transistor of a conductivity type; and a third transistor of the first conductivity type having a collector-emitter path connected in parallel with a collector-emitter path of the second transistor, wherein the system switching signal is at a first logic level. A third transistor is in a cut-off state when it is at a second logic level, and is in a conduction state to turn off the second transistor when it takes a second logic level, and the emitter output of the second transistor is applied to its base and its emitter a fourth transistor of a second conductivity type having a first level adjustment circuit;
a sixth transistor of the first conductivity type and of an emitter follower type, to which the collector output of the fifth transistor is applied to the base;
a seventh transistor of the first conductivity type having a collector-emitter path connected in parallel with the collector-emitter path of the sixth transistor, the seventh transistor being in a cutoff state when the system switching signal takes the second logic level; Therefore, when the first logic level is assumed, the seventh transistor becomes conductive and turns off the sixth transistor, and the emitter output of the sixth transistor is applied to the base and a second level adjustment circuit is applied to the emitter. and an eighth transistor of the second conductivity type, the collector of which is connected to the collector of the fourth transistor, and the signal supplied to the delay line is extracted from a collector connection point of the fourth and eighth transistors. A PAL color television signal to be supplied to the addition/subtraction circuit is extracted from the first level adjustment circuit, and is to be supplied from the second level adjustment circuit to the line sequential switching circuit.
A color signal reproducing circuit characterized in that a SECAM color television signal is extracted.