JPH01241995A - Chrominance signal processing circuit - Google Patents

Abstract

PURPOSE:To attain chrominance signal processing for both the PAL system and the NTSC system in one chrominance signal processing circuit by connecting a neutral point of the secondary side of an adding and subtracting transformer to ground substantially at the reception of an NTSC signal. CONSTITUTION:A PAL/NTSC detection circuit 15 detects whether the signal is in accordance with the PAL system or the NTSC system and in case of PAL signal, an output is a low level and a switching transistor(TR) 17 is turned off. In case of NTSC signal, the output is at a high level, the switching TR 17 is turned on and a non-delay color signal obtained at a collector of a TR 4 is connected to ground via a DC cut capacitor 16 and the switching TR 17 and then made ineffective. Thus, only the chrominance signal is inputted to a B-Y demodulation circuit 13 and an R-Y demodulation circuit 14 via a 1H delay line 10, no addition/subtraction is applied and the chrominance signal of the NTSC signal is demodulated. Thus, one chrominance signal processing circuit applies both the chrominance signal processing for the PAL system and the NTSC system.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a color signal processing circuit that switches and demodulates both PAL and NTSC color signals.

[Conventional technology]

Broadcasting systems for color signals in color television broadcasting include the NTSC system used in Japan, the United States, etc., and the PAL system used in Western Europe.Color television allows reception by switching between these two color signals. A television receiver has already been put into practical use.

In the demodulation of the color signal in the PAL system, the phase of the (RY) signal (among the A and (B-Y) signals that make up the color signal is inverted every IN (] horizontal period). Taking advantage of the fact that
-Y) Separate the IL and (B-Y) signals and
-Y demodulation circuit and B-Y demodulation circuit.

FIG. 3 is a circuit diagram showing an example of such a conventional addition/subtraction circuit. A carrier color signal applied from the band pass amplifier 1 to the base of the transistor 4 via an emitter follower circuit composed of an NPN transistor 2 and a resistor 3 is transmitted from the emitter of the transistor 4 via a DC cut capacitor 20 to a 1H delay line 10. added to. This 1H
The output of the delay line 10 is input to the primary side of the adding/subtracting transformer 11. On the other hand, the non-delayed color signal is input from the collector of the PNP transistor 4 to the middle point of the secondary side of the adding/subtracting transformer 11, and in this adding/subtracting transformer 11, addition and subtraction are performed between the 1H delayed color signal and the non-delayed color signal, and the addition component As a result, the (RY) signal is canceled and the (B-Y) signal, which is twice as large as the (B-Y) signal, is applied to the B-Y demodulation circuit 13.

On the other hand, as a subtraction component, the (B-Y) signal is canceled out and (R
-Y) signal is given to the RY demodulation circuit 14 at twice the size. Resistor 5 connected to the emitter of transistor 4
The variable resistor 6, the capacitor 7, and the resistor 12 connected to the collector of the transistor 4 are used to vary the amplification degree of the transistor 4, thereby compensating for the loss of the 1H delay line 10 and achieving the optimum addition/subtraction operation. It is something to do. Further, a coil 8 and a resistor 9 are used for matching the 1H delay line 10, and 21 is a power supply terminal.

[Problem to be solved by the invention]

As mentioned above, when attempting to demodulate an NTSC color signal using a PAL signal processing circuit, the (B-Y) signal is and (RY) signals cannot be separated,
Normal color demodulation will not be performed. In such a case, it is necessary to separately provide a demodulation circuit for the N TSC color signal, but this complicates the circuit configuration and is not economical.

The purpose of the present invention is to solve such problems, improve the adder/subtractor circuit so that one color signal processing circuit can process color signals of both the PAL system and the NTSC system, and create an economical color signal. The purpose of this invention is to provide a processing circuit.

[Means to solve the problem]

The configuration of the present invention is such that from the emitter of the amplifying transistor
A 1H delayed chrominance signal is input to the primary side of the addition/subtraction 1 to lance through the H delay line, and a non-delayed chrominance signal is inputted from the collector of the amplification transistor to the midpoint of the secondary side of the addition/subtraction transformer to perform the addition/subtraction. In a color signal processing circuit having an addition/subtraction circuit that obtains (RY) and (B-Y) signals from both ends of the secondary side of a transformer, the output state of a detection circuit that detects the PAL system or the NTSC system. Accordingly, the present invention is characterized in that it includes switching means for substantially grounding the midpoint of the adding/subtracting transformer via a capacitor when receiving an NTSC signal.

〔Example〕

FIG. 1 is a circuit diagram of one embodiment of the present invention, and the same circuits as those shown in FIG. 3 are indicated by the same symbols. PAL/
[NTSC detection circuit] 5 detects whether the broadcast being received is in the PAL system or the NTSC system, -
For boat fishing, by detecting the difference in the frequency of the horizontal or vertical periodic signal or the frequency of the audio intermediate signal, a high output can be obtained at the time of the PAL signal signal port -1 NTSC signal.

In the case of the PAL, signal, the switching transistor 17 is off, and the operation is exactly the same as the conventional circuit. When receiving an NTSC signal, the switching transistor 17 is turned on, and the non-delayed color signal obtained from the collector of the 1-transistor 4 is grounded via the DC cut capacitor 16 and the switching transistor 17 and becomes invalid. Therefore, only the color signal that has passed through the 1H delay line 10 is input to the B-Y demodulation circuit 13 and the R-Y demodulation circuit 4, and no addition or subtraction operations are performed, but normal color signal demodulation of the NTSC signal is performed. It turns out. That is,
One color signal processing circuit supports PAL system and NTS C
Color demodulation of both methods is possible.

In this embodiment, since addition and subtraction operations are performed in PAL demodulation, the F(-Y demodulation circuit 13 and R-
The ([3-Y) signal and (R-Y) signal input to [Y demodulation circuit] 4 are twice the respective components of the original carrier color signal J), or when receiving an NTSC signal, addition or subtraction is performed. Therefore, only 1 times the input can be obtained.
The color density is different when receiving PAL and NTSC signals.

FIG. 2 is a circuit diagram of a second embodiment of the invention. In this embodiment, a center point tap is provided on the primary side of the adding/subtracting transformer 19, and a second switching transistor 18 is connected between this center point tap and the ground.
The number of turns on the primary side of the adding/subtracting transformer 19 is effectively halved by interlocking with the converter 19, thereby doubling the color signal output to the secondary side. The color density at the time of traffic lights is the same.

〔Effect of the invention〕

As explained above, the present invention enables PAL and NTSC signals to be processed in one color signal processing circuit by substantially grounding the middle point of the secondary side of the adding/subtracting transformer when receiving an NTSC signal.
This has the advantage of being able to perform color signal processing for both the C method.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing an embodiment of the present invention, FIG. 2 is a circuit diagram showing a second embodiment of the invention, and FIG. 3 is a circuit diagram showing an example of a conventional color signal processing circuit. . 1 ・Bandpass amplifier, 2, 4.17.18... Transistor, 3, 5, 9.12... Resistor, 6... Variable resistor, 7, 16.20... Capacitor, 8.・・・
Coil, 10... 1H delay line, 11.19... Addition/subtraction transformer, 13... B-Y demodulation circuit, 14... R-Y
Demodulation circuit, 15 - PAL/NTSC detection circuit.

Claims (1)

[Claims] A 1H delayed color signal is input from the emitter of the amplification transistor to the primary side of the adding/subtracting transformer via the 1H delay line,
A non-delayed color signal is input from the collector of the amplifying transistor to the middle point of the secondary side of the adding/subtracting transformer, and a (RY) signal and a (B-Y) signal are generated from both ends of the secondary side of the adding/subtracting transformer, respectively. In a color signal processing circuit having an adder/subtractor circuit configured to obtain a signal, the midpoint of the adder/subtractor transformer is substantially grounded via a capacitor when receiving an NTSC signal, according to the output state of a detection circuit for detecting the PAL system or the NTSC system. A color signal processing circuit characterized in that it is equipped with a switching means for switching the color signal.