JPH07114508B2 - Color signal processing circuit - Google Patents

Description

The present invention relates to a color signal processing circuit for switching and demodulating color signals of both PAL signals and NTSC signals.

[Conventional technology]

There are two color signal broadcasting systems for color television broadcasting, the NTSC system used in Japan and the US and the PAL system used in Western Europe. A color television that can switch between these two color signals. John receiver has been put to practical use. When demodulating color signals in the PAL system,
Using the fact that the phase of the (RY) signal of the (RY) signal and (BY) signal that compose the color signal is inverted every 1H (1 horizontal period), it is passed through the 1H delay line. The color signal and the non-delayed color signal are added / subtracted, and as a result, (R-
The (Y) signal and the (BY) signal are separated and supplied to the RY demodulation circuit and the BY demodulation circuit, respectively.

FIG. 3 is a circuit diagram showing an example of such a conventional addition / subtraction circuit. Bandpass amplifier 1 to NPN transistor 2
The carrier color signal applied to the base of the transistor 4 via the emitter follower circuit composed of the resistor 3 and the resistor 3 is a DC cut capacitor from the emitter of the transistor 4.
Added to 1H delay line 10 via 20. The output of the 1H delay line 10 is input to the primary side of the addition / subtraction transformer 11. On the other hand, the non-delayed color signal is input from the collector of the PNP transistor 4 to the midpoint of the secondary side of the addition / subtraction transformer 11, and the addition / subtraction transformer 11 performs the addition / subtraction of the 1H delay color signal and the non-delayed color signal to obtain the addition component. As a result, the (RY) signal is canceled and the (BY) signal is given to the BY demodulation circuit 13 in a double size.

On the other hand, as the subtraction component, the (BY) signals are canceled out (R
-Y) signal is given to the RY demodulation circuit 14 in double size. The resistor 5 connected to the emitter of the transistor 4, the variable resistor 6, the capacitor 7 and the resistor 12 connected to the collector of the transistor 4 are for varying the amplification degree of the transistor 4, which causes the loss of the 1H delay line 10. Is compensated for and an optimum addition / subtraction operation is performed. The coil 8 and the resistor 9 are for matching the 1H delay line 10, and 21 is a power supply terminal.

[Problems to be Solved by the Invention]

As described above, when an attempt is made to demodulate an NTSC color signal with the PAL system signal processing circuit, (R-
Since the phase inversion for every 1H of the Y signal is not performed, (B-
The Y) signal and the (RY) signal cannot be separated, and normal color demodulation cannot be performed. In such a case, it is necessary to separately provide a demodulation circuit for NTSC color signals, but this makes the circuit configuration complicated and is not economical.

An object of the present invention is to solve such a problem, improve an adder / subtractor circuit so that one color signal processing circuit can process both PAL and NTSC color signals, and provide an economical color signal processing circuit. To provide.

[Means for Solving the Problems]

The configuration of the present invention is 1H from the emitter of the amplifying transistor.
A 1H delayed chrominance signal is input to the primary side of the addition / subtraction transformer via a delay line, and a non-delayed chrominance signal is input to the midpoint of the secondary side of the addition / subtraction transformer from the collector of the amplification transistor, and the 2H of the addition / subtraction transformer is input. From both ends of the next side (R
-Y) signal and (B-Y) signal are added in the color signal processing circuit having an addition / subtraction circuit, and the PAL system or NTS
According to the output state of the detection circuit that detects the C method, when the NTSC signal is received, the midpoint of the secondary side of the addition / subtraction transformer is substantially grounded via a capacitor, and the midpoint of the primary side of the addition / subtraction transformer is grounded. It is characterized in that a switching means is provided.

〔Example〕

FIG. 1 is a circuit diagram of an example of a circuit related to the present invention.
The same circuits as those shown in the figure are denoted by the same symbols.
The PAL / NTSC detection circuit 15 detects whether the received broadcast is the PAL system or the NTSC system, and generally, the frequency of the horizontal or vertical periodic signal or the frequency of the audio intermediate signal is different. By detecting, a low output is obtained for the PAL signal and a high output is obtained for the NTSC signal.

In the case of the PAL signal, the switching transistor 17 is off, and the operation is exactly the same as the circuit of FIG. NTSC
At the time of signal, the switching transistor 17 is turned on,
The non-delayed color signal obtained from the collector of the transistor 4 is the DC cut capacitor 16 and the switching transistor.
It is dropped to the ground via 17 and becomes invalid. Therefore, BY
Only the color signals that have passed through the 1H delay line 10 are input to the demodulation circuit 13 and the RY demodulation circuit 14, and the addition / subtraction operation is not performed.
The normal color signal of the SC signal is demodulated.
That is, one color signal processing circuit can perform both PAL and NTSC color demodulation.

In this circuit, since the addition and subtraction operation is performed in the PAL system demodulation, the BY demodulation circuit 13 and the RY demodulation circuit
The (BY) signal and the (RY) signal respectively input to 14 are twice the respective components of the original carrier color signal,
Since addition and subtraction are not performed when the NTSC signal is received, only 1 time input can be obtained, and the color depth differs when the PAL signal and the NTSC signal are received.

FIG. 2 is a circuit diagram of an embodiment of the present invention. In this embodiment, a midpoint tap is provided on the primary side of the adder / subtractor transformer 19, and a second switching transistor 18 is connected between this midpoint tap and ground. It can be turned on in conjunction with each other to adjust the turns ratio on the primary side of the addition / subtraction transformer 19 to be substantially halved. That is, the ratio between the primary side and the secondary side of the addition / subtraction transformer can be doubled. Therefore, the color signal output to the secondary side of this adder / subtractor transformer is boosted by a factor of two, and the same color depth should be used without changing the color intensity between the PAL signal and the NTSC signal. You can

〔The invention's effect〕

INDUSTRIAL APPLICABILITY As described above, according to the present invention, the middle point of the secondary side of the adder / subtractor transformer is substantially grounded at the time of receiving the NTSC signal, so that one color signal processing circuit performs both color signal processing of the PAL system and the NTSC system. There is an effect that can be done.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing an example of a circuit related to the present invention, FIG. 2 is a circuit diagram showing an embodiment of the present invention, and FIG. 3 is a circuit diagram showing an example of a conventional color signal processing circuit. . 1 …… Band pass amplifier, 2,4,17,18 …… Transistor, 3,5,9,12 …… Resistance, 6 …… Variable resistor, 7,16,20…
… Capacitor, 8… Coil, 10… 1H delay line, 11,19
...... Addition / subtraction transformer, 13 ... BY demodulation circuit, 14 ... R
-Y demodulation circuit, 15 ... PAL / NTSC detection circuit.

Claims (1)

[Claims] 1. A 1H delayed chrominance signal is input to the primary side of an addition / subtraction transformer from an emitter of the amplification transistor via a 1H delay line, and a 1H delay color signal is input from a collector of the amplification transistor to a midpoint of a secondary side of the addition / subtraction transformer. The delayed chrominance signal is input, and both ends (R-
In a color signal processing circuit having an adder / subtractor circuit adapted to obtain a Y) signal and a (BY) signal, a PAL system or an NTS
According to the detection state of the detection circuit that detects the C method, when the NTSC signal is received, the midpoint of the secondary side of the addition / subtraction transformer is substantially grounded via a capacitor, and the midpoint of the primary side of the addition / subtraction transformer is grounded. A color signal processing circuit, comprising: