JPS6359272B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention provides a semiconductor layer, first and second electrodes made of a superconductor that are ohmicly connected to the semiconductor layer and for flowing a superconducting current through the semiconductor layer, and The present invention relates to a superconducting element having a third electrode disposed on a region between the first and second electrodes of a semiconductor layer and for controlling the superconducting current, and a method for manufacturing the same.

As the above-mentioned superconducting element, one having the configuration described below with reference to FIG. 1 has been proposed.

That is, a semi-insulating semiconductor substrate 1 is provided with a semiconductor layer 2 as a buffer layer having a low carrier concentration.
and, for example, a semiconductor layer 3 as an n-type active layer are formed in that order by epitaxial growth.

Electrodes 4 and 5 made of a superconductor are ohmicly connected to the semiconductor layer 3 to allow a superconducting current to flow therethrough.

Furthermore, in the region between the electrodes 4 and 5 of the semiconductor layer 3,
An electrode 6 for controlling superconducting current flowing through the semiconductor layer 3 forms a shot junction 7 with the semiconductor layer 3.
are arranged to form a

The above is the structure of the conventionally proposed superconducting element.

According to a superconducting element having such a configuration,
By connecting a power source between the electrodes 4 and 5 via the load, a superconducting current can be caused to flow through the load through the electrodes 4 and 5 and the region between the electrodes 4 and 5 of the semiconductor layer 3. can.

Further, when a control voltage is applied between one of the electrodes 4 and 5 and the electrode 6, a depletion layer 8 expands in the semiconductor layer 3 from the Schottky junction 7 in a manner corresponding to the value of the control voltage.

Therefore, the superconducting current flowing to the load through the region between the electrodes 4 and 5 of the semiconductor layer 3 described above can be controlled in the region between the electrodes 4 and 5 of the semiconductor layer 3.

Therefore, according to the configuration of the conventional superconducting element shown in FIG.
It can function as a FET.

However, the structure of the conventional superconducting element shown in FIG. 1 has the drawback that the gain can only be about 3 at most, and therefore a high gain cannot be obtained.

Furthermore, the configuration of the conventional superconducting element shown in FIG. 1 has the disadvantage that it is necessary to prepare a power source with a high voltage of 100 mV to be connected between the electrodes 4 and 5.

Furthermore, in the case of the conventional superconducting element configuration shown in FIG. 1, the control voltage applied between one of electrodes 4 and 5 and electrode 6 needs to have a high voltage of 100 mV or more. It had the following drawbacks.

Therefore, the present invention aims to propose a novel superconducting element as described above and a method for manufacturing the same, which is free from the above-mentioned drawbacks.

First, in order to facilitate understanding of the superconducting device according to the present invention, an example of the superconducting device that is the basis of the present invention will be described.

FIG. 2 shows a first embodiment of a superconducting element, which is the basis of the present invention, and has the configuration described below.

That is, on a semi-insulating semiconductor substrate 11 made of GaAs, for example, which corresponds to the semiconductor substrate 1 of the conventional superconducting element shown in FIG. A corresponding semiconductor layer 12 as a buffer layer (so-called non-doped) having a low carrier concentration is formed.

Further, on the semiconductor layer 12, a semiconductor layer 13 made of, for example, Al _x Ga _1-x As (0<x≦1) having a high n-type carrier concentration, and a semiconductor layer 13 made of (so-called non-doped), for example, GaAs having a low carrier concentration. Semiconductor layer 1 consisting of
4 and a high carrier concentration of the n-type, e.g. Al _x
Semiconductor layers 15 made of Ga _1-x As are stacked in this order by a known epitaxial growth method, and semiconductor layers 13,
Semiconductor laminate 16 having a laminate configuration of 14 and 15
is formed.

In this case, the semiconductor layers 13 and 15 have a higher energy band gap than the semiconductor layer 14,
Therefore, heterojunctions 25 and 26 are formed between semiconductor layers 13 and 14 and between 14 and 15.

In addition, a removed portion 18 is provided in the semiconductor stack 16 that crosses the semiconductor layers 13 and 14 and reaches the semiconductor layer 15.
and 19 are formed, and electrodes 20 and 21 are formed in the removed portions 18 and 19 of the semiconductor layer 1.
3, 14 and 15 are connected to each other. Note that the semiconductor layers 13 and 1 of the semiconductor stack 16 with the removed portions 18 and 19 formed in this manner
The length of 4 is selected to be equal to or less than the attenuation distance of the superconducting electron pair.

Furthermore, the electrodes 20 and 21 of the semiconductor stack 16
In the region between, an electrode 22 is arranged so as to form a shot junction 23 with the semiconductor layer 15 of the semiconductor stack 16.

The above is the first part of the superconducting element that is the basis of the present invention.
This is the configuration of the embodiment.

According to the superconducting element having such a configuration, which is the basis of the present invention, the semiconductor laminate 16 corresponds to the semiconductor layer 3 of the conventional superconducting element shown in FIG. By connecting a power source between electrodes 21 and 21 through the load, the electrodes 4
and 5, and electrodes 20 and 2 of the semiconductor stack 16
A superconducting current can flow through the region between 1 and 1.

Moreover, since the electrode 22 corresponds to the electrode 6 of the conventional superconducting element shown in FIG. 1, if a control voltage is applied between one of the electrodes 20 and 21 and the electrode 22, the semiconductor stack 16, a depletion layer 24 expands from the shot junction 23 in a manner that corresponds to the value of the control voltage.

Therefore, the electrode 20 of the semiconductor stack 16 described above
The superconducting current flowing to the load through the region between the semiconductor stack 16 and 21 can be controlled in the region between the semiconductor stack 16.

Therefore, the configuration of the superconducting element shown in FIG. 2, which is the basis of the present invention, can be used as a metal short gate type superconducting three-terminal FET, as in the case of the conventional superconducting element shown in FIG. function can be obtained.

However, in the case of the configuration of the superconducting element shown in FIG. 2, which is the basis of the present invention, what corresponds to the semiconductor layer 3 of the conventional superconducting element shown in FIG.
A semiconductor stack 16 has a structure in which a semiconductor layer 13 having a high carrier concentration, a semiconductor layer 14 having a low carrier concentration, and a semiconductor layer 15 having a high carrier concentration are stacked. Therefore, it has a semiconductor superlattice structure.

Therefore, as described above, when current flows through the semiconductor stack 16, carrier electrons are supplied from the semiconductor layers 13 and 15 to the semiconductor layer 14 of the semiconductor stack 16, and the carrier electrons move. , the above-mentioned current flows. In this case, a sufficient amount of carrier electrons are supplied to the semiconductor layer 14 from the semiconductor layers 13 and 15. On the other hand, since the semiconductor layer 14 has a low carrier concentration, the carrier mobility in the semiconductor layer 14 is high.

Therefore, the configuration of the superconducting element shown in FIG. 2, which is the basis of the present invention, has the characteristic that a higher gain can be obtained than the conventional superconducting element shown in FIG. 1.

In addition, in the case of the superconducting element shown in FIG. 2, which is the basis of the present invention, the power supply and control voltage connected between the electrodes 20 and 21 are set to a voltage sufficiently lower than that of the conventional superconducting element shown in FIG. It has the characteristic that it can be used as

Next, a second embodiment of a superconducting element, which is the basis of the present invention, will be described with reference to FIG.

In FIG. 3, parts corresponding to those in FIG. 2 are designated by the same reference numerals.

The superconducting element shown in FIG. 3, which is the basis of the present invention, is similar to the superconducting element shown in FIG. 2, which is the basis of the present invention, except that the semiconductor layer 13 of the semiconductor stack 16 is omitted. It has the following configuration.

The above is the second part of the superconducting element which is the basis of the present invention.
This is the configuration of the embodiment.

According to the superconducting element that is the basis of the present invention having such a configuration, it is the same as the superconducting element that is the basis of the present invention shown in FIG. 2, except for the matters mentioned above. The same excellent characteristics as in the case of the superconducting element which is the basis of the present invention shown in FIG. 2 are obtained.

Next, a third embodiment of a superconducting element, which is the basis of the present invention, will be described with reference to FIG.

In FIG. 4, parts corresponding to those in FIG. 2 are designated by the same reference numerals.

The superconducting element shown in FIG. 4, which is the basis of the present invention, is different from the superconducting element shown in FIG. It has the same configuration as the conductive element.

The above is the third part of the superconducting element that is the basis of the present invention.
This is the configuration of the embodiment.

According to the superconducting element which is the basis of the present invention having such a configuration, it is the same as the superconducting element which is the basis of the present invention shown in FIG. 2, except for the matters mentioned above. The same excellent characteristics as in the case of the superconducting device which is the basis of the present invention shown in FIG. 2 can be obtained.

The embodiments of the superconducting element that form the basis of the present invention have been clarified above.

In the case of the superconducting element that is the basis of the present invention described above in FIGS. 2 to 4, the semiconductor layers 13 and 15 of the semiconductor stack 16 (in the case of FIG. 3, only the semiconductor layer 15)
has a higher energy band gap than the semiconductor layer 14, so the ohmic connection of the electrodes 20 and 21 with the semiconductor stack 16 is stronger in the semiconductor layer 14 than in the semiconductor layers 13 and 15. is also well established, so that when current flows through the semiconductor stack 16 as described above,
The current mainly flows through the semiconductor layer 14 of the semiconductor stack 16.

However, when current flows through the semiconductor stack 16, a portion of the current flows through the semiconductor layers 13 and 1.
5 (in the case of FIG. 3, only the semiconductor layer 15).

Therefore, when a current flows through the semiconductor stack 16, the current does not effectively flow through the semiconductor layer 14. Therefore, the above-mentioned characteristics are not fully exhibited.

Therefore, the present invention proposes a new superconducting element that is based on the superconducting element described above in FIGS. This will become clear from what follows.

FIG. 5 shows a first embodiment of a superconducting element according to the invention, which is based on the superconducting element described above in FIG.

In FIG. 5, parts corresponding to those in FIG. 2 are designated by the same reference numerals.

The superconducting device according to the present invention shown in FIG. 5 has the same configuration as the superconducting device shown in FIG. 2, which is the basis of the present invention, except for the following points.

That is, the semiconductor layer 13 of the semiconductor stack 16
Oxide films 31 and 32 of the material of the semiconductor layer 13 are formed on the surfaces facing the removed parts 18 and 19, respectively, and semiconductor layers 31 and 32 of the semiconductor layer 15 of the semiconductor stack 16 are formed on the surfaces facing the removed parts 18 and 19, respectively. Oxide films 33 and 34 of the material of layer 15 are formed.

The above is the configuration of the first embodiment of the superconducting element according to the present invention.

The superconducting device according to the present invention having such a configuration is similar to the superconducting device shown in FIG. 2, which is the basis of the present invention, except for the matters mentioned above. The same excellent characteristics as in the case of the superconducting device which is the basis of the present invention shown in FIG.

However, according to the superconducting element according to the present invention shown in FIG. 5, the electrodes 20 and 21 are ohmicly connected only to the semiconductor layer 14 of the semiconductor stack 16. When current flows through it, it effectively flows only through semiconductor layer 14.

Therefore, the superconducting element according to the present invention shown in FIG. 5 is characterized in that it fully exhibits the above-mentioned features of the superconducting element shown in FIG. 2, which is the basis of the present invention.

Next, a second embodiment of the superconducting element according to the present invention will be described with reference to FIG.

In FIG. 6, parts corresponding to those in FIG. 5 are designated by the same reference numerals.

The superconducting device according to the invention shown in FIG. 6 has the same configuration as the superconducting device according to the invention shown in FIG. 5, except for the following points.

That is, the removed portions 18 and 19 are sunk deeper into the semiconductor layer 14 of the semiconductor stack 16 than the semiconductor layers 13 and 15 are.

The above is the configuration of the second embodiment of the superconducting element according to the present invention.

According to the superconducting device according to the present invention having such a configuration, it is similar to the superconducting device according to the present invention shown in FIG. 5 except for the above-mentioned matters. The same excellent characteristics as in the case of superconducting devices can be obtained.

Next, an embodiment of the method for manufacturing a superconducting element according to the present invention shown in FIG. 5 will be described with reference to FIG. 7.

In FIG. 7, parts corresponding to those in FIG. 5 are designated by the same reference numerals.

A semi-insulating semiconductor substrate 11 made of GaAs similar to that described above in FIG. 5 is prepared in advance (FIG. 7A).

Then, on the semiconductor substrate 11, a semiconductor layer 12 as a buffer layer (so-called non-doped) having a low carrier concentration similar to that described above in FIG.
(Figure 7B).

Next, on the semiconductor layer 12, a semiconductor layer 13 having a high n-type carrier concentration and a high energy band gap, similar to that described above in FIG.
A (so-called non-doped) semiconductor layer 1 having a low carrier concentration and a low energy band gap
4, and a semiconductor layer 15 having a high n-type carrier concentration and a high energy band gap,
The semiconductor layers 13, 14, and 15 are stacked in this order by a known epitaxial growth method to form a semiconductor stack 16 having a stacked structure (FIG. 7C).

Next, a removed portion 18 is added to the semiconductor stack 16 that crosses the semiconductor layers 13 and 14 and reaches the semiconductor layer 15.
and 19 are formed by an etching method known per se (FIG. 7D).

Next, by thermal oxidation treatment, the semiconductor laminate 16 is
Removed portions 18 and 19 of semiconductor layers 13 and 15 of
Oxide films 31 and 32, and 33 and 34 are formed on the surface facing the surface (FIG. 7E).

Next, the electrodes 20 and 21 are placed in the removed portions 18 and 19, ohmicly connected only to the semiconductor layer 14, and the electrode 22 is placed on the semiconductor layer 15 of the semiconductor stack 16. Joining 23
to form.

In the manner described above, the superconducting element according to the present invention shown in FIG. 5 is manufactured.

The above is an embodiment of the method of manufacturing the superconducting element of the present invention shown in FIG. 5 according to the present invention.

According to this embodiment of the method for manufacturing a superconducting element according to the present invention, as is clear from the above, the characteristic superconducting element according to the present invention shown in FIG. 5 can be easily manufactured. It has the characteristic that it can be done.

Note that the above description has only shown a few embodiments of the present invention, and in the structure of the superconducting element that is the basis of the present invention shown in FIG. It is also possible to have a structure in which an oxide film is formed on the surface facing 18 and 19.

Further, in the structure of the superconducting element shown in FIG. 4, which is the basis of the present invention, an oxide film is formed on the surfaces of the semiconductor layers 13 and 15 of the semiconductor stack 16 facing the removed parts 18 and 19. You can also do that.

Furthermore, the electrode 22 can be arranged on the semiconductor layer 15 of the semiconductor stacked body 16 with an insulating film interposed therebetween to form a so-called insulated gate type structure.

In addition, without departing from the spirit of the invention,
Various modifications and changes may be made.

[Brief explanation of the drawing]

FIG. 1 is a schematic cross-sectional view showing a conventional superconducting element. FIG. 2, FIG. 3, and FIG. 4 are schematic cross-sectional views showing first, second, and third embodiments of the superconducting element, respectively, which are the basis of the present invention. Fifth
6 are schematic cross-sectional views showing first and second embodiments of the superconducting element according to the present invention, respectively. FIG. 7 is a schematic cross-sectional view showing sequential steps of an embodiment of the method for manufacturing a superconducting element according to the present invention shown in FIG. 11...Semi-insulating semiconductor substrate, 12, 13, 1
4, 15... semiconductor layer, 16... semiconductor laminate,
18, 19...Removed portion, 20, 21, 22... Electrode, 23... Shotki junction, 31-34... Oxide film.

Claims (1)

[Scope of Claims] 1: a semiconductor layer; first and second electrodes made of a superconductor that are ohmicly connected to the semiconductor layer and for flowing a superconducting current through the semiconductor layer; and a third electrode disposed on a region between the first and second electrodes and for controlling the superconducting current, wherein the semiconductor layer has a first layer having a low carrier concentration. A semiconductor layer and a second semiconductor layer having a higher carrier concentration than the first semiconductor layer and a higher energy band gap than the first semiconductor layer form a heterojunction therebetween. A superconducting element comprising a semiconductor laminate that is stacked to form a superconductor, and wherein the first and second electrodes are ohmicly connected only to the first semiconductor layer of the semiconductor laminate. . 2. A first semiconductor layer having a low carrier concentration on a semiconductor substrate, and a first semiconductor layer having a higher carrier concentration than the first semiconductor layer and having a wider energy band gap than the first semiconductor layer. a step of forming a semiconductor stacked body in which a second semiconductor layer having a second semiconductor layer is stacked so as to form a heterojunction therebetween; The first and second semiconductor layers reach the semiconductor layer of
forming first and second oxide films on first and second surfaces of the second semiconductor layer facing the first and second removed parts; first and second removed portions ohmicly connected to the first semiconductor layer;
1. A method for manufacturing a superconducting element, comprising the step of forming an electrode.