JPS6356960A - High-speed semiconductor device - Google Patents
High-speed semiconductor deviceInfo
- Publication number
- JPS6356960A JPS6356960A JP61202110A JP20211086A JPS6356960A JP S6356960 A JPS6356960 A JP S6356960A JP 61202110 A JP61202110 A JP 61202110A JP 20211086 A JP20211086 A JP 20211086A JP S6356960 A JPS6356960 A JP S6356960A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor layer
- semiconductor
- mocvd
- substrate
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 73
- 239000000758 substrate Substances 0.000 claims abstract description 27
- 150000001875 compounds Chemical class 0.000 claims abstract description 16
- 239000012808 vapor phase Substances 0.000 claims description 3
- 229910052751 metal Inorganic materials 0.000 claims description 2
- 239000002184 metal Substances 0.000 claims description 2
- 238000002488 metal-organic chemical vapour deposition Methods 0.000 abstract description 16
- 229910001218 Gallium arsenide Inorganic materials 0.000 abstract description 15
- 239000012535 impurity Substances 0.000 abstract description 12
- 239000013078 crystal Substances 0.000 abstract description 10
- RBFQJDQYXXHULB-UHFFFAOYSA-N arsane Chemical compound [AsH3] RBFQJDQYXXHULB-UHFFFAOYSA-N 0.000 abstract description 5
- 230000006866 deterioration Effects 0.000 abstract description 3
- 239000000463 material Substances 0.000 abstract 2
- 229910000070 arsenic hydride Inorganic materials 0.000 abstract 1
- 239000002019 doping agent Substances 0.000 abstract 1
- 229910052799 carbon Inorganic materials 0.000 description 9
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 8
- 239000007789 gas Substances 0.000 description 7
- 238000005259 measurement Methods 0.000 description 5
- 239000002994 raw material Substances 0.000 description 5
- JLTRXTDYQLMHGR-UHFFFAOYSA-N trimethylaluminium Chemical compound C[Al](C)C JLTRXTDYQLMHGR-UHFFFAOYSA-N 0.000 description 5
- 230000005533 two-dimensional electron gas Effects 0.000 description 5
- 238000011109 contamination Methods 0.000 description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- XYFCBTPGUUZFHI-UHFFFAOYSA-N Phosphine Chemical compound P XYFCBTPGUUZFHI-UHFFFAOYSA-N 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000005669 field effect Effects 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 238000000103 photoluminescence spectrum Methods 0.000 description 2
- VOITXYVAKOUIBA-UHFFFAOYSA-N triethylaluminium Chemical compound CC[Al](CC)CC VOITXYVAKOUIBA-UHFFFAOYSA-N 0.000 description 2
- 238000001947 vapour-phase growth Methods 0.000 description 2
- 101100215641 Aeromonas salmonicida ash3 gene Proteins 0.000 description 1
- 229920002799 BoPET Polymers 0.000 description 1
- 229910000530 Gallium indium arsenide Inorganic materials 0.000 description 1
- 241000700560 Molluscum contagiosum virus Species 0.000 description 1
- 229910052785 arsenic Inorganic materials 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- NZQSCKCTGMHIRY-UHFFFAOYSA-N ethylindium Chemical compound CC[In] NZQSCKCTGMHIRY-UHFFFAOYSA-N 0.000 description 1
- 229910052733 gallium Inorganic materials 0.000 description 1
- 239000004047 hole gas Substances 0.000 description 1
- 150000004678 hydrides Chemical class 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 229910000073 phosphorus hydride Inorganic materials 0.000 description 1
- 229920000139 polyethylene terephthalate Polymers 0.000 description 1
- -1 that is Substances 0.000 description 1
- 238000005979 thermal decomposition reaction Methods 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
- XCZXGTMEAKBVPV-UHFFFAOYSA-N trimethylgallium Chemical compound C[Ga](C)C XCZXGTMEAKBVPV-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
- H01L29/7786—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT
- H01L29/7787—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT with wide bandgap charge-carrier supplying layer, e.g. direct single heterostructure MODFET
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/04—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes
- H01L29/045—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes by their particular orientation of crystalline planes
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Junction Field-Effect Transistors (AREA)
- Recrystallisation Techniques (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は高速半導体装置、特にm−v族化合物半導体に
よる例えばHEMT、 2DEG−FET、 TEG−
FET等と呼称される高電子移動度トランジスタもしく
は2次元電子ガスチャンネル型電界効果トランジスタ、
あるいはMES −FETいわゆるショットキゲート型
電界効果トランジスタ等の高速半導体装置に関わる。[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to high-speed semiconductor devices, particularly HEMTs, 2DEG-FETs, TEG-FETs, etc., using m-v group compound semiconductors.
High electron mobility transistor or two-dimensional electron gas channel field effect transistor called FET etc.
It also relates to high-speed semiconductor devices such as MES-FETs, so-called Schottky gate field effect transistors.
本発明は特定された結晶面特に+ 311) B結晶面
に切り出された基板上に、有機全屈気相成長いわゆるM
OCVD(1’letalorganlc Chemi
cal VaporDepos i t 1on)によ
るm−v族化合物半導体層による不純物混入が小さく高
純度化された動作領域を形成し、高速性や低雑音性等の
向上を図る。The present invention is directed to organic total directional vapor phase growth, so-called M
OCVD (1'retalorganlc Chemi
A highly purified operating region is formed with less impurity contamination by the m-v group compound semiconductor layer produced by Cal VaporDeposits 1on), and improvements in high speed, low noise, etc. are achieved.
従来、高速半導体装置例えばHEMT、 2DEG−F
ET。Conventionally, high-speed semiconductor devices such as HEMT, 2DEG-F
E.T.
TEG −PETあるいはMES −FET等において
、A 1 xGal−xAs (0≦x〈1)あるいは
InyGal−yAs(0≦y<1)なるm−v族化合
物が電子移動度の高いこと比較的結晶性に優れた半導体
層を形成しやすいなどの理由によって広(用いられてい
る。In TEG-PET or MES-FET, m-v group compounds such as A 1 xGal-xAs (0≦x<1) or InyGal-yAs (0≦y<1) have high electron mobility and are relatively crystalline. It is widely used because it is easy to form a semiconductor layer with excellent properties.
この場合、このm−v族化合物半導体を気相成長する基
板いわゆるサブストレイトとしては、(10(1)結晶
面を主面とするGaAs単結晶基板が用いられ、これの
上に上述のA I GaAs系あるいはInGaAs系
m−v族化合物半導体層を例えばMOCVDによってエ
ピタキシャル成長する構成が採られている。In this case, a GaAs single crystal substrate having a (10(1) crystal plane as a main surface) is used as a substrate on which the m-v group compound semiconductor is grown in a vapor phase. A configuration is adopted in which a GaAs-based or InGaAs-based m-v group compound semiconductor layer is epitaxially grown by, for example, MOCVD.
ところで、上述した高速半導体装置において、その動作
領域となるm−v族化合物半導体層においては炭素Cや
シリコンSi等の残留不純物の混人が掻刃回避され、結
晶性に優れた半導体層であることが、その高速性及び低
雑音化に必要とされる。ところが、上述したように(1
00)基板上に、例えばトリメチルアルミニウム(CH
3)3A ltを原料としてA I GaAs系化合物
半導体層をMOCVDによって形成する場合等において
最大の欠点が炭素Cの汚染で、これが高速半導体装置に
おける、より高速性及び低雑音化等の特性向上の妨げに
なっている。By the way, in the above-mentioned high-speed semiconductor device, the mixture of residual impurities such as carbon C and silicon Si is avoided in the m-v group compound semiconductor layer, which is the operating region, and the semiconductor layer has excellent crystallinity. This is required for its high speed and low noise. However, as mentioned above (1
00) For example, trimethylaluminum (CH
3) When forming an A I GaAs-based compound semiconductor layer by MOCVD using 3A lt as a raw material, the biggest drawback is carbon C contamination, which is a major drawback for improving characteristics such as higher speed and lower noise in high-speed semiconductor devices. It's a hindrance.
本発明は前述したようにm−v族化合物半導体による高
速半導体装置における残留不純物による特性の低下を効
果的に回避し、高純度のm−v族半導体の?l0CVD
気相成長半導体層による高速半導体装置を構成し、高移
動度したがって高速性に優れ、低雑音したがって良好な
特性を有する高速半導体装置を構成する。As described above, the present invention effectively avoids deterioration of characteristics due to residual impurities in high-speed semiconductor devices using m-v group compound semiconductors, and improves the performance of high-purity m-v group compound semiconductors. l0CVD
A high-speed semiconductor device is constructed using a vapor-phase grown semiconductor layer, and has high mobility and therefore excellent high speed performance, and low noise and therefore good characteristics.
すなわち、本発明においてはMOCVDによるIII−
V族気相成長半導体における不純物の混入、したがって
結晶性が基板の結晶面に強い依存性を有することを見出
し、基板の結晶面方位を選定することによって上述した
諸問題の解決を図る。That is, in the present invention, III-
It was discovered that the contamination of impurities in Group V vapor-grown semiconductors, and therefore the crystallinity, has a strong dependence on the crystal plane of the substrate, and the above-mentioned problems are solved by selecting the crystal plane orientation of the substrate.
因みに、ジャーナル・オブ・クリスタル・グロウス(J
ournal of Crystal Growth)
68.(1984)148−156等にも(100)結
晶基板についての報告がなされていて(111)A面の
特定について論ぜられているが、本発明はこれとは異な
る結果を得たものであり、この異なる結果に基づいて特
性に優れた高速半導体装置を提供するものである。Incidentally, the Journal of Crystal Growth (J
(Crystal Growth)
68. (1984) 148-156 etc. have also reported on the (100) crystal substrate and discussed the identification of the (111) A plane, but the present invention has obtained a different result. Based on these different results, a high-speed semiconductor device with excellent characteristics is provided.
本発明においては主面を(311) B (すなわち(
311)のAs面)、とする( 311) B基板上に
形成されたm−v族化合物の有機全屈気相成長すなわち
(1’1OcVD)による半導体層を動作領域とする。In the present invention, the main surface is (311) B (that is, (
311) As the As plane), the operating region is a semiconductor layer formed on the (311)B substrate by organic total diagonal vapor phase growth (1'1OcVD) of an m-v group compound.
MOCVDは良く知られているように、■族元素、A
l 、Ga、 Inについては、その有機物金属ガスの
トリメチルアルミニウム(TMA)、 )リメチルガ
リウム(TMG)、 )リメチルインジウム(T旧)
、或いはトリエチルアルミニウム(TEA)、 I−
リエチルガリウム(TEG)、 )リエチルインジウ
ム(TEI)等を用い、■族元Z A s + Pにつ
いてはその水素化物のアルシンASH3,フォスフイン
円13を用いるものである。そして、これらを■族原料
に対する■族原料の比(以下V1m比という)をもって
反応容器中に送り込む。反応容器中には、上述した(3
11)B基板を所要の基板塩度Tsをもって配置してお
くものであり、これの表面で、上述した原料ガスの熱分
解によって基板表面にm−v族化合物半導体層をエピタ
キシャル成長する。As is well known, MOCVD is a method for treating group ■ elements, A
For Ga, In, the organic metal gases trimethylaluminum (TMA), )limethylgallium (TMG), )limethylindium (T old)
, or triethylaluminum (TEA), I-
Ethyl gallium (TEG), ) ethyl indium (TEI), etc. are used, and for the group element Z As + P, its hydrides arsine ASH3 and phosphine circle 13 are used. Then, these are fed into the reaction vessel at a ratio of the Group 2 raw material to the Group 1 raw material (hereinafter referred to as the V1m ratio). In the reaction vessel, the above-mentioned (3
11) A B substrate is placed with a required substrate salinity Ts, and an m-v group compound semiconductor layer is epitaxially grown on the surface of the substrate by thermal decomposition of the above-mentioned source gas.
上述の本発明による高速半導体装置によれば、その動作
領域における不純物すなわちアクセプタとなる炭素(C
)の混入が効果的に回避され、また■/■比を小に選定
することによってドナー不純物すなわちシリコン(Si
)の減少を図ることができ、これによって高いキャリア
の移動度と良好な結晶性を有し、高速性及び低雑音性の
優れた特性を有する高速半導体装置を得ることができた
。According to the above-described high-speed semiconductor device according to the present invention, carbon (C
) can be effectively avoided, and by selecting a small ratio of ■/■, donor impurities, that is, silicon (Si
), thereby making it possible to obtain a high-speed semiconductor device that has high carrier mobility and good crystallinity, and has excellent characteristics of high speed and low noise.
第2図はそのV/nI比を変化させた場合のキャリア濃
度すなわちアクセプタとしての炭素Cの濃度、及びドナ
ーとしてのStの混入濃度の測定結果を示すもので、こ
の場合基板温度Ts = 800’ CとしたGaAs
基板上に原料ガスとしてトリメチルアルミニウム、トリ
メチルガリウム、アルシンを用いてMOCVDによって
形成したA Ii o、 33Gao、 87AS化合
物半導体層についての測定を行った場合である。Figure 2 shows the measurement results of the carrier concentration, that is, the concentration of carbon C as an acceptor, and the mixed concentration of St as a donor when the V/nI ratio is changed. In this case, the substrate temperature Ts = 800' GaAs with C
This is a case in which measurements were performed on A Iio, 33Gao, and 87AS compound semiconductor layers formed on a substrate by MOCVD using trimethylaluminum, trimethylgallium, and arsine as source gases.
同図においてム印は本発明による(311) B Ga
As単結晶基板上に前述したA I GaAs系MOC
VD半導体層を形成した場合の測定結果をプロットした
点で何れもn型特性を示したものであり、この場合V/
III比を減少させていった場合においてもp型を呈す
ることがなかった。また、同図においてO印及び・印は
それぞれ従来の(100) GaAs基板上に同様のM
OCVDによる半導体層を形成した場合のV/I[[比
に対するキャリア濃度を示し、○印はp型、・印はn型
特性を示したものである。また、同図において口印及び
■印はそれぞれ(311)AのGaAs基板上に同様の
MOCVDによる半導体層を形成した場合のそれぞれの
■/■比に対するキャリア濃度の測定結果をプロットし
たもので0印はp型を呈したもの、■印はn型を呈した
ものであり、従来の(100)基板及び(311) A
基板上にm−v族半導体をMOCVDによって形成した
場合、V / III比を小とするときはp型を呈して
くる。これは、Gaサイトに炭素Cが入り込み、これが
アクセプタとして作用することに因る。またV1m比を
大とすればシリコンSt等のドナーの混入が大となって
それぞれキャリア濃度が増大してしまう。すなわち、第
2図によって明らかなように、従来の例のように、(1
00)基板上に形成したMOCVD半導体屓半導合、■
/■比が80〜120付近でp型n型の反転が生じてい
るに比し、本発明による(311)B基板上にMOCV
D半導体層を形成した場合V/■比を充分低くしていっ
てその面が白濁するに至ってもp型−n型間の反転が観
測されず、充分高抵抗化された。したがってV1m比を
充分小さい値例えば100以下に選定すれば、ドナー及
びアクセプタの両不純物についてその混入量を低減化し
、キャリア濃度の低い高抵抗半導体層をその動作領域と
して構成することができることになる。In the same figure, the mu mark is according to the present invention (311) B Ga
The above-mentioned A I GaAs MOC on an As single crystal substrate
Plotting the measurement results when forming a VD semiconductor layer shows n-type characteristics, and in this case, V/
Even when the III ratio was decreased, p-type was not exhibited. In addition, in the same figure, the marks O and . respectively indicate similar M on the conventional (100) GaAs substrate.
Indicates the carrier concentration relative to the V/I[[ ratio when a semiconductor layer is formed by OCVD, where ◯ indicates p-type characteristics, and ◯ indicates n-type characteristics. In addition, in the same figure, the marks and ■ marks are plots of the measurement results of carrier concentration with respect to the respective ■/■ ratios when a semiconductor layer was formed by similar MOCVD on a (311)A GaAs substrate. The mark indicates p-type, and the ■ mark indicates n-type.
When an m-v group semiconductor is formed on a substrate by MOCVD, it becomes p-type when the V/III ratio is made small. This is because carbon C enters the Ga site and acts as an acceptor. Furthermore, if the V1m ratio is increased, the amount of donors such as silicon St increases, and the carrier concentration increases. That is, as is clear from FIG. 2, as in the conventional example, (1
00) MOCVD semiconductor layer formed on the substrate, ■
/■ Inversion of p-type and n-type occurs when the ratio is around 80 to 120, whereas MOCV on the (311)B substrate according to the present invention
When the D semiconductor layer was formed, even if the V/■ ratio was made sufficiently low and the surface became cloudy, no reversal between p-type and n-type was observed, and the resistance was sufficiently high. Therefore, if the V1m ratio is selected to be a sufficiently small value, for example, 100 or less, the amount of both donor and acceptor impurities mixed in can be reduced, and a high-resistance semiconductor layer with a low carrier concentration can be configured as its operating region.
また本発明による(311)B基板上にA l xGa
l−xAs(x=o、33)のノンドープのMOCVD
半導体層を形成した場合と、従来の(100)基板上に
ノンドープの同様のA l xGal−xAs(x=
0.33)のMOCVD半導体層を形成した場合のそれ
ぞれの4Kにおけるフォトルミネッセンススペクトルを
第3図及び第4図に示す。これらにおいてはV/I[I
=135とした場合である。Moreover, Al x Ga on the (311)B substrate according to the present invention
Non-doped MOCVD of l-xAs (x=o, 33)
When a semiconductor layer is formed, and when a similar non-doped Al xGal-xAs (x=
FIGS. 3 and 4 show photoluminescence spectra at 4K when MOCVD semiconductor layers of 0.33) were formed. In these, V/I[I
= 135.
第3図及び第4図において右側すなわち長波長側のピー
クbは残留ドナー−炭素アクセプタ遷移によるものであ
り、左側、すなわち短波長側のピークaは炭素アクセプ
タが残留ドナーに束縛された半値幅6.516me V
のエキシトンピークである。In FIGS. 3 and 4, the peak b on the right side, that is, on the long wavelength side, is due to the residual donor-carbon acceptor transition, and the peak a on the left side, that is, on the short wavelength side, is the half-width 6 where the carbon acceptor is bound to the residual donor. .516me V
This is the exciton peak of
第3図及び第4図において左右のピークa及びb、すな
わちエキシトンピークと残留不純物に起因したド+−−
アクセブタペア発光のピークの相対的な強さの差をみて
明らかなように第3図の本発明による(311)B基板
上に形成されたMOCVD半導体層は従来の(100)
基板上に形成された半導体層に比し残留炭素による影響
が少なく結晶性に優れたものであることがわかる。In Figures 3 and 4, the left and right peaks a and b, that is, the exciton peak and the do+-- caused by residual impurities.
As is clear from the difference in relative intensity of the acceptor pair emission peaks, the MOCVD semiconductor layer formed on the (311)B substrate according to the present invention in FIG. 3 is different from that of the conventional (100)
It can be seen that this layer is less affected by residual carbon and has excellent crystallinity than a semiconductor layer formed on a substrate.
尚、本発明者等の研究考察によれば、炭素汚染は、 (
311)8面が最も小さく、次いで(111) B 。According to the research and consideration of the present inventors, carbon pollution is (
311)8 plane is the smallest, followed by (111) B.
(100)、 (111)A、(311)Aへと順次そ
の汚染が大となって行くことが確認された。It was confirmed that the contamination increased in order from (100), (111)A, and (311)A.
本発明装置は各種の高速半導体装置例えば2次元キャリ
ア(電子、ホール)ガスチャンネルによるFETすなわ
ち例えばHEMT、 2DEG−FET、 TEG−F
ETへの適用、あるいはMES −FHT等各種の高速
半導体装置に通用できるものであるが、第1図を参照し
て本発明を2次元電子ガスチャンネル型のFETに通用
する場合の一例を説明する。The device of the present invention can be applied to various high-speed semiconductor devices such as FETs using two-dimensional carrier (electron, hole) gas channels, such as HEMT, 2DEG-FET, TEG-F.
Although the present invention can be applied to ET or various high-speed semiconductor devices such as MES-FHT, an example of the case where the present invention is applied to a two-dimensional electron gas channel type FET will be explained with reference to FIG. .
図において、(1)はその−主面(1a)が(311)
Bすなわち(311) Asの半絶縁性単結晶GaA
s基板で、その主面(1a)上に、順次例えば5000
人の厚さにアンドープのGaAsよりなる第1の半導体
層(2)と、例えば厚さ100人のアンドープのA 1
xGal−xAs(x=o、:+3)より成る第2の
半導体層(3)と、n型の不純物のSiがドープされた
A l xGal−xAs(x= 0.33)より成る
第3の半導体層(4)と、同様のn型のGaAsより成
る第4の半導体層(5)とが原料ガスの供給を制御する
ことによって連続MOCVDによって形成する。この場
合原料ガスとしては、例えばTMA、TMG。In the figure, (1) means that its main surface (1a) is (311)
B i.e. (311) As semi-insulating single crystal GaA
s substrate, on its main surface (1a), for example, 5000
A first semiconductor layer (2) made of undoped GaAs with a thickness of, for example, 100 mm;
A second semiconductor layer (3) made of xGal-xAs (x=o, :+3) and a third semiconductor layer (3) made of AlxGal-xAs (x=0.33) doped with n-type impurity Si. The semiconductor layer (4) and a fourth semiconductor layer (5) made of n-type GaAs are formed by continuous MOCVD by controlling the supply of raw material gas. In this case, the raw material gas is, for example, TMA or TMG.
及びアルシンAsHiを用いる。そして第4の半導体N
(5)の一部をエツチング除去して第3の半導体層(4
)の一部を外部に露呈しここにゲート例えばショットキ
ゲート電極(6)を被着し、その両側に残された第4の
半導体層(5)に夫々ソース電極(7)及びドレイン電
極(8)を形成する。このような構成によれ、第1の半
導体層(2)の第2の半導体層(3)との界面に2次元
電子ガス層(9)によるチャンネルが形成されたPET
が構成される。and arsine AsHi. and the fourth semiconductor N
(5) is partially etched away to form a third semiconductor layer (4).
) is exposed to the outside and a gate, for example, a Schottky gate electrode (6) is deposited thereon, and the fourth semiconductor layer (5) left on both sides is covered with a source electrode (7) and a drain electrode (8), respectively. ) to form. With this configuration, a PET film in which a channel is formed by the two-dimensional electron gas layer (9) at the interface between the first semiconductor layer (2) and the second semiconductor layer (3).
is configured.
このような構成によるFETは、その動作領域すなわち
2次元電子ガス層(9)が形成されるアンドープの第1
及び第2の半導体層(2)及び(3)を、前述したよう
にそのV/Iffが例えば30程度に近い小なる値でM
OCVD した半導体層とすることによって、第2図で
説明したようにキャリア濃度が充分低い半導体層として
構成できるので、残留不純物さらにはこの残留不純物に
よる結晶性の低下が回避されることによって高い電子移
動度と低雑音化が得られ特性のよい高速半導体装置が構
成される。The FET with such a configuration has an operating region, that is, an undoped first region where a two-dimensional electron gas layer (9) is formed.
and the second semiconductor layers (2) and (3), as described above, with V/Iff of M at a small value close to about 30, for example.
By using an OCVD semiconductor layer, it is possible to construct a semiconductor layer with a sufficiently low carrier concentration as explained in Fig. 2, thereby avoiding residual impurities and deterioration of crystallinity due to these residual impurities, resulting in high electron mobility. A high-speed semiconductor device with good characteristics and low noise can be constructed.
さらにまた上述した例においては■−■族化合物として
A l xGal−xAs系について主として説明した
が、InyGa l−yAs系MOCVD半導体層によ
る高速半導体装置に通用することもできる。Furthermore, in the above-mentioned example, the explanation was mainly made of the AlxGal-xAs based compound as the ■-■ group compound, but it can also be applied to a high-speed semiconductor device using an InyGaly-yAs based MOCVD semiconductor layer.
また、本発明は上述した例に限らず各種高速半導体装置
に本発明を通用できるものであり、例えばA I Ga
As上にGaAs層が形成されたいわゆる逆11E肘に
適用することもでき、この場合において下層のAβを含
むA I GaAs層の結晶性の問題が解消されたこと
によって、これの上に形成するGaAsの特性も向上す
ることから、より移動度の高い2電子ガス層によるチャ
ンネル形成が可能となる。Further, the present invention is applicable not only to the above-mentioned example but also to various high-speed semiconductor devices, such as A I Ga
It can also be applied to the so-called reverse 11E elbow in which a GaAs layer is formed on As, and in this case, the problem of crystallinity of the underlying Aβ-containing A I GaAs layer has been solved, so that Since the characteristics of GaAs are also improved, it becomes possible to form a channel using a two-electron gas layer with higher mobility.
また、2次元電子ガス層によるFETに限らす2次元ホ
ールガス層によるFETにおいても同様に特性向上を図
ることができる。Furthermore, characteristics can be similarly improved not only in FETs using a two-dimensional electron gas layer but also in FETs using a two-dimensional hole gas layer.
上述したように本発明による高速半導体装置によれば、
キャリアの移動度すなわち高速性を高めることができ、
また優れた結晶性を有する動作領域による高速半導体装
置を構成するので高速性に優れ低雑音の特性の良い優れ
た高速半導体装置を得ることができ、その実用上の利益
は極めて大きい。As described above, according to the high-speed semiconductor device according to the present invention,
Carrier mobility, or high speed, can be increased,
Furthermore, since a high-speed semiconductor device is constructed with an operating region having excellent crystallinity, an excellent high-speed semiconductor device with excellent high-speed performance and low noise characteristics can be obtained, and its practical benefits are extremely large.
第1図は本発明装置の一例の路線的断面図、第2図は本
発明の説明に供す、るV/I[[比とキャリア濃度の関
係の測定結果を示す曲線図、第3図及び第4図はそれぞ
れ(311)B基板及び(100)基板上にMOCVD
による半導体層を形成したもののフォトルミネッセンス
スペクトル図である。
(11は基板、(2)〜(5)は第1〜第4の半導体層
である。FIG. 1 is a line cross-sectional view of an example of the device of the present invention, FIG. 2 is a curve diagram showing the measurement results of the relationship between V/I ratio and carrier concentration, and FIG. Figure 4 shows MOCVD on (311)B substrate and (100) substrate, respectively.
FIG. 3 is a photoluminescence spectrum diagram of a semiconductor layer formed using the above method. (11 is a substrate, (2) to (5) are first to fourth semiconductor layers.
Claims (1)
機金属気相成長半導体層より成る動作領域を具備するこ
とを特徴とする高速半導体装置。{311}B A high-speed semiconductor device comprising an operating region made of a metal organic vapor phase grown semiconductor layer of a III-V compound formed on a substrate.
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP61202110A JPH0783109B2 (en) | 1986-08-28 | 1986-08-28 | High-speed semiconductor device |
GB8719817A GB2195050B (en) | 1986-08-28 | 1987-08-21 | Semiconductor devices and methods of manufacture |
KR1019870009226A KR950014278B1 (en) | 1986-08-28 | 1987-08-24 | High speed semiconductor and its making method |
FR8711943A FR2611313A1 (en) | 1986-08-28 | 1987-08-26 | VERY FAST SOLID SEMICONDUCTOR COMPRISING GROUP III / V AND METHOD OF MANUFACTURING THE SAME |
DE3728524A DE3728524C2 (en) | 1986-08-28 | 1987-08-26 | High speed semiconductor device and process for its manufacture |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP61202110A JPH0783109B2 (en) | 1986-08-28 | 1986-08-28 | High-speed semiconductor device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS6356960A true JPS6356960A (en) | 1988-03-11 |
JPH0783109B2 JPH0783109B2 (en) | 1995-09-06 |
Family
ID=16452126
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP61202110A Expired - Lifetime JPH0783109B2 (en) | 1986-08-28 | 1986-08-28 | High-speed semiconductor device |
Country Status (5)
Country | Link |
---|---|
JP (1) | JPH0783109B2 (en) |
KR (1) | KR950014278B1 (en) |
DE (1) | DE3728524C2 (en) |
FR (1) | FR2611313A1 (en) |
GB (1) | GB2195050B (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02298040A (en) * | 1989-03-18 | 1990-12-10 | Korea Electron Telecommun | Manufacture of hemt wherein doping property of algaas layer is improved |
JP2010225981A (en) | 2009-03-25 | 2010-10-07 | Fujitsu Ltd | Optical semiconductor device, integrated element and method of manufacturing optical semiconductor device |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH03278542A (en) * | 1990-03-28 | 1991-12-10 | Hitachi Ltd | Semiconductor device |
EP0535293A1 (en) * | 1991-01-29 | 1993-04-07 | Max-Planck-Gesellschaft zur Förderung der Wissenschaften e.V. | A method of fabricating a compositional semiconductor device |
JP3360105B2 (en) * | 1994-03-04 | 2002-12-24 | 富士通株式会社 | Method for manufacturing semiconductor device |
US8829336B2 (en) | 2006-05-03 | 2014-09-09 | Rochester Institute Of Technology | Nanostructured quantum dots or dashes in photovoltaic devices and methods thereof |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4830787B1 (en) * | 1967-12-28 | 1973-09-22 | ||
US3721583A (en) * | 1970-12-08 | 1973-03-20 | Ibm | Vapor phase epitaxial deposition process for forming superlattice structure |
JPS52101698A (en) * | 1976-02-23 | 1977-08-25 | Toshiba Corp | Vapor phase growth of gallium arsenide |
US4122407A (en) * | 1976-04-06 | 1978-10-24 | International Business Machines Corporation | Heterostructure junction light emitting or responding or modulating devices |
-
1986
- 1986-08-28 JP JP61202110A patent/JPH0783109B2/en not_active Expired - Lifetime
-
1987
- 1987-08-21 GB GB8719817A patent/GB2195050B/en not_active Expired - Lifetime
- 1987-08-24 KR KR1019870009226A patent/KR950014278B1/en not_active IP Right Cessation
- 1987-08-26 FR FR8711943A patent/FR2611313A1/en active Pending
- 1987-08-26 DE DE3728524A patent/DE3728524C2/en not_active Expired - Lifetime
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02298040A (en) * | 1989-03-18 | 1990-12-10 | Korea Electron Telecommun | Manufacture of hemt wherein doping property of algaas layer is improved |
JP2010225981A (en) | 2009-03-25 | 2010-10-07 | Fujitsu Ltd | Optical semiconductor device, integrated element and method of manufacturing optical semiconductor device |
Also Published As
Publication number | Publication date |
---|---|
KR880003401A (en) | 1988-05-16 |
KR950014278B1 (en) | 1995-11-24 |
GB2195050B (en) | 1990-05-30 |
JPH0783109B2 (en) | 1995-09-06 |
GB8719817D0 (en) | 1987-09-30 |
GB2195050A (en) | 1988-03-23 |
DE3728524C2 (en) | 1996-05-09 |
DE3728524A1 (en) | 1988-03-10 |
FR2611313A1 (en) | 1988-08-26 |
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