JPS635695U - - Google Patents
Info
- Publication number
- JPS635695U JPS635695U JP9866186U JP9866186U JPS635695U JP S635695 U JPS635695 U JP S635695U JP 9866186 U JP9866186 U JP 9866186U JP 9866186 U JP9866186 U JP 9866186U JP S635695 U JPS635695 U JP S635695U
- Authority
- JP
- Japan
- Prior art keywords
- insulating plate
- insulating
- slit
- semiconductors
- end surface
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 229920001296 polysiloxane Polymers 0.000 claims 1
- 239000004065 semiconductor Substances 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 3
- 238000000034 method Methods 0.000 description 2
Landscapes
- Mounting Components In General For Electric Apparatus (AREA)
- Insulating Bodies (AREA)
Description
第１図は本考案の原理構成図、第２図は本考案
の一実施例を示す構成図、第３図は本考案に係る
絶縁板を用いたトランジスタの取付け方法を説明
するための工程図、第４図は従来例の側面図、第
５図は第４図に示す絶縁板１２の平面図、第６図
は他の従来例の側面図、第７図は第６図に示す絶
縁板２２の平面図、第８図は他の従来例の側面図
、第９図は第８図に示す絶縁板２６の平面図であ
る。
第１図乃至第３図において、３０は絶縁板、３
２はスリツト、３４は孔、３６は放熱板である。
Figure 1 is a diagram showing the principle of the present invention, Figure 2 is a diagram showing an embodiment of the invention, and Figure 3 is a process diagram illustrating a method for mounting a transistor using an insulating plate according to the present invention. , FIG. 4 is a side view of the conventional example, FIG. 5 is a plan view of the insulating plate 12 shown in FIG. 4, FIG. 6 is a side view of another conventional example, and FIG. 7 is the insulating plate shown in FIG. 6. 22, FIG. 8 is a side view of another conventional example, and FIG. 9 is a plan view of the insulating plate 26 shown in FIG. In FIGS. 1 to 3, 30 is an insulating plate;
2 is a slit, 34 is a hole, and 36 is a heat sink.
Claims (1)
からその所定内部位置まで延在するスリツト３２
を半導体の配列ピツチに従つて複数個形成してな
ることを特徴とする絶縁板の構造。 One end surface 32A of the insulating plate 30 such as a silicone sheet
a slit 32 extending from to a predetermined internal position thereof;
An insulating plate structure comprising a plurality of insulating plates formed according to the arrangement pitch of semiconductors.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9866186U JPS635695U (en) | 1986-06-27 | 1986-06-27 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9866186U JPS635695U (en) | 1986-06-27 | 1986-06-27 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS635695U true JPS635695U (en) | 1988-01-14 |
Family
ID=30966807
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9866186U Pending JPS635695U (en) | 1986-06-27 | 1986-06-27 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS635695U (en) |
-
1986
- 1986-06-27 JP JP9866186U patent/JPS635695U/ja active Pending
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