JPS6355617A - Key input device - Google Patents

Abstract

PURPOSE:To simplify the structure and to reduce the production cost of a key input device by setting plural resistances in series to the key scan lines and providing a key switch at the signal side of each resistance. CONSTITUTION:A key input device consists of a microcomputer 4, a key input part 5 and a key scan line driving part 6. Then resistances R14-R29 are set in series to the key scan lines 7-10 and the key switches S17-S32 are connected to the resistance R14-R29 respectively. Thus the key inputs are accepted in time division by those switches S17-S32 and plural part 6. At the same time, the change of potential due to the change of resistance value of each of lines 7-10 undergoes the analog/digital conversion through an analog input terminal for decision of ternary or higher levels. Thus it is possible to decrease the number of terminals of the microcomputer 4.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a key input device having a plurality of key input switches.

[Prior Art] Conventionally, in this type of key input device, as shown in FIG. 6, a key matrix is used as a data input device for a microcomputer, and key input is determined by key scanning. A plurality of key switches 51 to 516 are connected in a matrix between the output port and the input port of the microcomputer 1. In addition, a key scan signal is output from the output boats PAO to PA3 so that the terminals of the output boats are made active (high level) sequentially by time sharing, and the ON and OFF signals from the key switch at that time are sent to the input boat P.
Inputting to BO to PB3 is repeated as many times as the number of terminals on the outgoing boat, and thereby the key input is determined as to which key has been pressed.

[Problem to be solved by the invention J] However, in such a conventional circuit configuration, it is necessary to protect the terminals of the output boat from short circuiting when two or more key switches 51 to 51B are pressed at the same time. It is necessary to add D1 to D16.

Also, since input ports are used as data input terminals, at least 8 microcomputer terminals are used for, say, 16 key switches, which increases the number of key switches. However, the disadvantage was that the number of terminals on the microcomputer became insufficient.

SUMMARY OF THE INVENTION An object of the present invention is to provide a key input device that eliminates the above-mentioned drawbacks, simplifies the circuit configuration of a key scan line, and at the same time saves the number of terminals used in a microcomputer.

[Means for Solving the Problems] In order to achieve the above object, the present invention provides a time-saving method using a plurality of key input switches arranged in a matrix and a plurality of key scan drivers having key scan lines for scanning the key input switches. A key input device that accepts key inputs in divisions is characterized in that a plurality of resistors are connected in parallel to a key scan line, and a key input switch is connected to one side of each resistor.

[Function] The present invention provides a key input device that receives and receives key inputs in a time-sharing manner using a plurality of key input switches and a plurality of key scan drive units, in which a plurality of resistors are arranged in parallel on a key scan line, and each Since a key switch is provided on one side of the resistor,
The structure is simplified and manufacturing costs are reduced, and changes in potential due to changes in the resistance value of each key scan line are converted into analog-to-digital data through an analog input terminal.
Since it is possible to determine the value or more, the terminals of the microcomputer can be saved, which is especially effective when there are a large number of key switches.

[Example] Hereinafter, an example of the present invention will be described in detail with reference to the drawings.

FIG. 1 shows a circuit configuration of an embodiment of the present invention, where 4
5 is a microcomputer that determines key input according to the control procedure shown in FIGS. 4 and 5; 5 is a key input unit;
Reference numeral 6 denotes a key scan line drive unit (key scan drive unit) for determining key input. Note that the above-mentioned control procedure is stored in advance in the internal memory ROMI of the microcomputer 4.

7 is the key scan line (A), which is the key switch S
Used when determining numbers 17 to 320. Similarly, 8 is a key scan line (B), and key switches S21 to S
It is used when determining 24. 9 is the key scan line
(C) and is used when determining the key switches S25 to S28. 10 is a key scan line (D),
It is not used when determining the key switches S29 to S32.

R19-R13 are drive resistances for transistors T5-T8, and R14-R25 are resistors arranged in parallel with key scan lines 7-10. Also, R9 is the input line 11
is a common load resistance. Q5 to Q8 are inverters.

Furthermore, AND and pcO to pc3 are each terminals of the microcomputer 4, AND is an analog input terminal that can discriminate three or more values of potential changes due to changes in the resistance value of each key scan line, and pcO to pc3 are each two-value terminals. This is an output terminal that can perform digital output. Further, νS is an arbitrarily set potential.

The microcomputer 4 also has an analog input terminal A.
A latch circuit that latches the input potential from ND, and A that converts the latched potential into analog-to-digital (A/D)
A register that stores digital data converted by the A/D converter AD and the A/D converter AD A memory in which a plurality of data corresponding to the τ scale shown in FIG. 3, which is the threshold value, is stored in advance. ROM2, a central processing unit 02 which sequentially compares the contents of the register R and data of the memory ROM2 to determine which key switch is being pressed, and an encoder EN which converts the determination result of the central processing unit CPt1 into a corresponding character code and outputs it. It has C.

In the above configuration, for example, if the output terminal pcO is activated (high level), the key scan line (A)
The operation when the motor 7 is in the driving state will be explained with reference to FIGS. 2 and 3.

First, when the output terminal pcO is activated, the transistor T5 becomes "ON" (conductive), and the equivalent circuit when the key scan line (A) 7 is driven is as shown in FIG. Furthermore, the analog input values to the analog input terminal AND depending on the "ON" and "OFF" states of the key switches SL7 to S20 at this time are as shown in FIG.

Here, "ON" refers to a conductive state, and "OFF" refers to an open state.

In addition, R1//R'' in Figure 3 represents two resistors Ri+
Shows the combined resistance value of RJ (for example, R26, R14).

Similarly, R+//R, +//h are three resistances R+, Rr
, Ri=the combined resistance value.

In this way, the microcomputer 1 has a line resistance R1
4 to R29 and the voltage divided by the load resistor R9 are compared with threshold values of three or more values to determine which key switch has been pressed.

That is, as shown in FIG. 3, there are four key switches S17.
According to the state of ~S20, 16 types of analog input values are obtained from the ND to the analog input terminal of the factory. Similarly, key scan line (B) 8, key scan line (C
) 9 and key scan line (I) 10, different analog input values are obtained from the analog input terminals AND, depending on the state of each key switch connected to the key scan line (I) 10. Therefore, the input state of the key switch can be correctly determined from the analog input value obtained in this way.

Next, referring to the flowcharts of FIGS. 4 and 5, the microcomputer 4 of the apparatus according to the embodiment of the present invention shown in FIG.
The control operation will be explained.

First, in step 101, an internal address counter indicating an address in the internal memory is set to "KEY" (predetermined value). Proceeding to the next step 102, the output terminal pcO is turned "ON", the KEY-IN subroutine of FIG. 5 is executed (step 103), and the output terminal pcOA is turned "ON".
OFF'' (step 104).

That is, in the KEY-IN subroutine, the input potential from the analog input terminal AND is latched by the latch circuit (step 201), and the potential is applied to the A/D converter A.
Step 202) converts the data into digital data in D and stores it in register R, and the contents of register R and memory ROM
In step 2, determine which key switch is being pressed by sequentially comparing the data corresponding to the threshold potential level in step 2.
03) After outputting key data from the encoder ENC according to the determination result (step 204), the process returns to the main routine.

Similarly to the above, in steps 104 to 113, key scan line (B) 8, key scan line (C)
9, and key scan line (D) lo. After converting the analog input values from analog to digital, input them into the internal memory. □ After the data is stored and the process of step 113 is completed, the first step Returning to step 101, the above-described process is repeated.

In the above embodiment, a key input device having 16 key switches arranged in a matrix has been described, but it goes without saying that the present invention can be applied regardless of the number of key switches.

[Effects of the Invention] As explained above, according to the present invention, in a key input device that receives and receives key inputs in a time-sharing manner using a plurality of key input switches and a plurality of key scan drive units, a plurality of key input switches are provided in a key scan line. The resistors are arranged in parallel and a key switch is provided on one side of each resistor, simplifying the structure and reducing manufacturing costs.In addition, changes in potential due to changes in the resistance value of each key scan line can be input in analog form. Analog-to-digital conversion is performed through the terminal so that three or more values can be discriminated, saving on microcomputer terminals.
This is especially effective when there are a large number of key switches.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing the configuration of a key input device in one embodiment of the present invention, FIG. 2 is a partial equivalent circuit diagram of FIG. 1, and FIG. 3 is an operating state of the circuit of FIG. 2. FIG. 4 is a flowchart showing the control operation of the key input device in FIG. 1, FIG. 5 is a flowchart showing the subroutine in FIG. 4, and FIG. 6 is the configuration of the conventional key input device. FIG. 4... Microcomputer, 5... Key input section, 6... Key scan drive section, 7-10... Key scan line, 51-S32... Key switch, R1-R25... Resistor , T5-T8...transistor, D1-D1[i...diode, Q5-Q6...inverter, pcO-pc3...output terminal, AND...analog input terminal. IJ device's 1,000-page round trip 2nd picture of the real Oshirobu/'1 Kai: I to state h'bro analog X
Kai direct B transfer 4th shift 3rd figure 1st turn A row 0 movement I ε Bo T main routine flowchart figure 4 figure 5

Claims (1)

[Scope of Claims] 1) A key input device that receives key inputs in a time-sharing manner using a plurality of key input switches arranged in a matrix and a plurality of key scan drive units having key scan lines that scan the key input switches, Connecting a plurality of resistors in parallel to the key scan line,
A key input device characterized in that the key input switch is connected to one side of each of the resistors. 2) In the device according to claim 1, a change in potential due to a change in resistance value of the key scan line is inputted through a single analog input terminal, and the input value is set as a threshold value of three or more values. 1. A key input device comprising: a control unit that determines key input by comparing . 3) In the device according to claim 2, the analog input terminal is connected to each of the plurality of input lines in the matrix arrangement, and is connected in parallel to a load resistor, and the load resistor and the key scan line are connected to each other in parallel. A key input device characterized in that a voltage divided by the resistor is input to the control section.